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公开(公告)号:US20100158158A1
公开(公告)日:2010-06-24
申请号:US12643489
申请日:2009-12-21
Applicant: Michel Menu , Ivan Bourmeyster
Inventor: Michel Menu , Ivan Bourmeyster
IPC: H04L27/14
CPC classification number: H03H17/0266 , G10L19/0204
Abstract: A signal processor for processing a digital input signal including samples sampled at a sampling frequency, the signal processor comprising a plurality of filters arranged to divide the digital input signal into a first signal in a first frequency band below a first cut-off frequency, and a second signal in a second frequency band above a second cut-off frequency; first frequency shifting circuitry arranged to shift the second signal to a frequency band below the first cut-off frequency; decimation circuitry arranged to decimate the first signal and the shifted second signal; and processing circuitry arranged to process the decimated first and second signals.
Abstract translation: 一种用于处理数字输入信号的信号处理器,所述数字输入信号包括以采样频率采样的采样的样本,所述信号处理器包括多个滤波器,所述多个滤波器布置成将数字输入信号划分成低于第一截止频率的第一频带中的第一信号,以及 在第二截止频率之上的第二频带中的第二信号; 第一频移电路,被布置成将第二信号移位到低于第一截止频率的频带; 抽取电路,被设置为抽取第一信号和移位的第二信号; 以及处理电路,被布置成处理抽取的第一和第二信号。
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公开(公告)号:US08379740B2
公开(公告)日:2013-02-19
申请号:US12643489
申请日:2009-12-21
Applicant: Michel Menu , Ivan Bourmeyster
Inventor: Michel Menu , Ivan Bourmeyster
IPC: H04K1/10
CPC classification number: H03H17/0266 , G10L19/0204
Abstract: A signal processor for processing a digital input signal including samples sampled at a sampling frequency, the signal processor comprising a plurality of filters arranged to divide the digital input signal into a first signal in a first frequency band below a first cut-off frequency, and a second signal in a second frequency band above a second cut-off frequency; first frequency shifting circuitry arranged to shift the second signal to a frequency band below the first cut-off frequency; decimation circuitry arranged to decimate the first signal and the shifted second signal; and processing circuitry arranged to process the decimated first and second signals.
Abstract translation: 一种用于处理数字输入信号的信号处理器,所述数字输入信号包括以采样频率采样的采样的样本,所述信号处理器包括多个滤波器,所述多个滤波器布置成将数字输入信号划分成低于第一截止频率的第一频带中的第一信号,以及 在第二截止频率之上的第二频带中的第二信号; 第一频移电路,被布置成将第二信号移位到低于第一截止频率的频带; 抽取电路,被设置为抽取第一信号和移位的第二信号; 以及处理电路,被布置成处理抽取的第一和第二信号。
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