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公开(公告)号:US07499470B2
公开(公告)日:2009-03-03
申请号:US11963898
申请日:2007-12-24
IPC分类号: H04J3/24
CPC分类号: H04L49/9094 , H04L47/10 , H04L47/34 , H04L49/90 , H04L49/9089
摘要: Packets or frames of data may be compressed, encrypted/decrypted, filtered, classified, searched or subjected to other deep-packet processing operations before being distributed through the internet. The microprocessor system and method of the present invention provide for the orderly processing of such data packets without disrupting or changing the sequence in which the data is intended to be transmitted to its destination. This is achieved by receiving frames into an input buffer for processing. Associated with this input buffer is a unit for determining the operation to be performed on each frame. An arbitrator assigns each frame to a processing core engine. An output buffer collects the processed frames, and a sequencer forwards the processed frames from the output buffer to their destination in the same order as received by the input/output buffer. Maintaining the sequence of data transmission is particularly useful in voice transmission, such as videos and movies.
摘要翻译: 数据包或数据帧可以在通过互联网分发之前被压缩,加密/解密,过滤,分类,搜索或经受其他深度包处理操作。 本发明的微处理器系统和方法提供这种数据分组的有序处理,而不会中断或改变数据要发送到其目的地的序列。 这通过将帧接收到用于处理的输入缓冲器中来实现。 与该输入缓冲器相关联的是用于确定要在每个帧上执行的操作的单元。 仲裁员将每个帧分配给处理核心引擎。 输出缓冲器收集经处理的帧,并且定序器按照输入/输出缓冲器接收的顺序将处理后的帧从输出缓冲区转发到其目的地。 保持数据传输的顺序在诸如视频和电影的语音传输中特别有用。