Method of fabrication on a gate pattern of a non-volatile memory device
    1.
    发明授权
    Method of fabrication on a gate pattern of a non-volatile memory device 有权
    在非易失性存储器件的栅极图案上的制造方法

    公开(公告)号:US06913972B2

    公开(公告)日:2005-07-05

    申请号:US09927594

    申请日:2001-08-10

    摘要: A method for fabricating a non-volatile memory device is provided. The method for fabricating a non-volatile memory device includes the steps of: forming a gate pattern in which a first conductive layer is used as a floating gate, a second conductive layer is used as a control gate, the first conductive layer, a dielectric layer, and the second conductive layer are sequentially stacked on a semiconductor substrate; forming a polishing stopper on the gate pattern and the semiconductor substrate; forming an interlayer insulating layer on the polishing stopper; forming a common source line (CSL) by etching a portion of the interlayer insulating layer, and a portion of the polishing stopper, and depositing a conductive material to the etched portions; planarizing the common source line and the interlayer insulating layer until the surface of the polishing stopper is exposed; partially etching back the polishing stopper until the surface of the second conductive layer is exposed; and forming a silicide layer on the exposed second conductive layer and the common source line.

    摘要翻译: 提供一种用于制造非易失性存储器件的方法。 用于制造非易失性存储器件的方法包括以下步骤:形成栅极图案,其中第一导电层用作浮置栅极,第二导电层用作控制栅极,第一导电层,电介质 层,第二导电层依次层叠在半导体基板上; 在栅极图案和半导体衬底上形成抛光止动件; 在抛光停止器上形成层间绝缘层; 通过蚀刻层间绝缘层的一部分和抛光止挡件的一部分,并将导电材料沉积到蚀刻部分,形成公共源极线(CSL); 平面化公共源极线和层间绝缘层,直到抛光止动器的表面露出; 部分地回蚀刻抛光止动件,直到第二导电层的表面露出; 以及在所述暴露的第二导电层和所述公共源极线上形成硅化物层。