公开(公告)号：US20050223103A1

公开(公告)日：2005-10-06

申请号：US10920231

申请日：2004-08-18

申请人： Kanji Hozumi ,  Naoki Yuzawa ,  Yuuichi Abe

发明人： Kanji Hozumi ,  Naoki Yuzawa ,  Yuuichi Abe

IPC分类号： G06F13/00 ,  G06F15/16 ,  H04L12/58

CPC分类号： H04L51/28 ,  G06Q10/107 ,  H04L51/12

摘要： A mail server 302 calculates a reject priority for every mail source address of an E-mail on the basis of a date/time when receiving the E-mail from a sender terminal 100, further, the mail server 302, if a mail source address of the mail which should be rejected, count of the E-mails exceeds a registerable mail address count in a receipt reject address list 304, executes control to register the mail addresses having higher reject priorities preferentially in the receipt reject address list 304.

摘要翻译： 邮件服务器302基于从发送者终端100接收电子邮件的日期/时间，还有邮件服务器302，如果邮件源地址 邮件的计数超过收件拒收地址列表304中的可登记的邮件地址计数，执行控制以在接收拒绝地址列表304中优先注册具有较高拒绝优先级的邮件地址。

公开(公告)号：US5621653A

公开(公告)日：1997-04-15

申请号：US497133

申请日：1995-06-30

申请人： Naoki Yuzawa

发明人： Naoki Yuzawa

IPC分类号： H01L21/82 ,  G06F17/50

CPC分类号： G06F17/5068

摘要： An method of, and an apparatus for, converting layout data of a conductive portion is obtained in which conversion of layout data of the conductive portion is automatically performed in a reduced processing time, designing is performed efficiently, and development stages are reduced in number. The layout data conversion apparatus comprises a basic pattern unit (basic layout pattern), a storage means 1, a design rule memory means 2, a means for storing information about connection between basic pattern units 3, a basic layout pattern generation means 4, a connection determination means 5 for determining whether conductive portions are connected to each other a layer information determining means 6, an element configuration change means 7, a means for detecting and eliminating violation of design rules 8, a means for storing and displaying layout pattern arrangement result information 9, and a computation control means 10 for controlling operations of these means.

摘要翻译： 获得了一种用于转换导电部分的布局数据的方法和装置，其中在缩短的处理时间内自动执行导电部分的布局数据的转换，有效地进行设计，并且开发阶段数量减少。 布局数据转换装置包括基本图案单元（基本布局图案），存储装置1，设计规则存储装置2，用于存储关于基本图案单元3之间的连接的信息的装置，基本布局图案生成装置4， 用于确定导电部分是否彼此连接的连接确定装置5层信息确定装置6，元件配置改变装置7，用于检测和消除违反设计规则8的装置，用于存储和显示布局图案布置结果的装置 信息9，以及用于控制这些装置的操作的计算控制装置10。

公开(公告)号：US20100204975A1

公开(公告)日：2010-08-12

申请号：US12662367

申请日：2010-04-13

申请人： Noriyasu Nakayama ,  Nobukazu Koizumi ,  Tomoki Kato ,  Naoki Yuzawa ,  Hiroyuki Hieda ,  Satoshi Hiramoto

发明人： Noriyasu Nakayama ,  Nobukazu Koizumi ,  Tomoki Kato ,  Naoki Yuzawa ,  Hiroyuki Hieda ,  Satoshi Hiramoto

IPC分类号： G06F17/50

CPC分类号： G06F17/5022 ,  G01R31/318357

摘要： A simulation method includes obtaining an execution log generated while a predetermined processing is executed by simulating a series of operations in a test model that is a modeled version of a test target device by causing a predetermined processing to be executed in the test model, extracting a processing unit log constituted by a predetermined processing unit from the execution log obtained in the obtaining, and simulating an operation in which processing corresponding to the processing unit log extracted in the extracting is executed in a test model in which a part of function of the test target device is modified, the operation being simulated on the basis of a setting condition set by a user.

摘要翻译： 模拟方法包括：在通过在测试模型中执行预定处理来模拟作为测试目标设备的建模版本的测试模型的测试模型中的一系列操作来获得执行预定处理时所执行的执行日志， 处理单元日志由预定处理单元构成，从获取中获得的执行日志构成，并且模拟在该测试模型中执行与提取中提取的处理单元对应相对应的处理的操作，其中测试功能的一部分 目标设备被修改，基于由用户设置的设置条件来模拟操作。

公开(公告)号：US20090204380A1

公开(公告)日：2009-08-13

申请号：US12314334

申请日：2008-12-08

申请人： Tomoki Kato ,  Nobukazu Koizumi ,  Noriyasu Nakayama ,  Naoki Yuzawa ,  Hiroyuki Hieda ,  Satoshi Hiramoto

发明人： Tomoki Kato ,  Nobukazu Koizumi ,  Noriyasu Nakayama ,  Naoki Yuzawa ,  Hiroyuki Hieda ,  Satoshi Hiramoto

IPC分类号： G06F17/50

CPC分类号： G06F11/3457 ,  G06F17/5022 ,  G06F17/5045 ,  G06F2201/81

摘要： A performance evaluation simulation apparatus divides a process into basic process units based on an execution log, calculates a throughput of each basic process unit from information held in the execution log, changes an arrangement structure so that a basic process unit with the calculated throughput exceeding a predetermined threshold is disposed in a hardware model, and performs a performance evaluation simulation on the hardware model and a software model to generate statistical information on which performance evaluation is based.

摘要翻译： 性能评估模拟装置基于执行日志将处理分为基本处理单元，根据执行日志中保存的信息计算每个基本处理单元的处理量，改变排列结构，使得计算出的吞吐量超过 在硬件模型中设置预定阈值，并对硬件模型和软件模型执行性能评估模拟，以生成基于性能评估的统计信息。

公开(公告)号：US08428927B2

公开(公告)日：2013-04-23

申请号：US12662367

申请日：2010-04-13

申请人： Noriyasu Nakayama ,  Nobukazu Koizumi ,  Tomoki Kato ,  Naoki Yuzawa ,  Hiroyuki Hieda ,  Satoshi Hiramoto

发明人： Noriyasu Nakayama ,  Nobukazu Koizumi ,  Tomoki Kato ,  Naoki Yuzawa ,  Hiroyuki Hieda ,  Satoshi Hiramoto

IPC分类号： G06F17/50

CPC分类号： G06F17/5022 ,  G01R31/318357

摘要： A simulation method includes obtaining an execution log generated while a predetermined processing is executed by simulating a series of operations in a test model that is a modeled version of a test target device by causing a predetermined processing to be executed in the test model, extracting a processing unit log constituted by a predetermined processing unit from the execution log obtained in the obtaining, and simulating an operation in which processing corresponding to the processing unit log extracted in the extracting is executed in a test model in which a part of function of the test target device is modified, the operation being simulated on the basis of a setting condition set by a user.

摘要翻译： 模拟方法包括：在通过在测试模型中执行预定处理来模拟作为测试目标设备的建模版本的测试模型的测试模型中的一系列操作来获得执行预定处理时所执行的执行日志， 处理单元日志由预定处理单元构成，从获取中获得的执行日志构成，并且模拟在该测试模型中执行与提取中提取的处理单元对应相对应的处理的操作，其中测试功能的一部分 目标设备被修改，基于由用户设置的设置条件来模拟操作。

公开(公告)号：US08214189B2

公开(公告)日：2012-07-03

申请号：US12314334

申请日：2008-12-08

申请人： Tomoki Kato ,  Nobukazu Koizumi ,  Noriyasu Nakayama ,  Naoki Yuzawa ,  Hiroyuki Hieda ,  Satoshi Hiramoto

发明人： Tomoki Kato ,  Nobukazu Koizumi ,  Noriyasu Nakayama ,  Naoki Yuzawa ,  Hiroyuki Hieda ,  Satoshi Hiramoto

IPC分类号： G06F17/50 ,  G06F9/45 ,  G06G7/62

CPC分类号： G06F11/3457 ,  G06F17/5022 ,  G06F17/5045 ,  G06F2201/81

摘要： A performance evaluation simulation apparatus divides a process into basic process units based on an execution log, calculates a throughput of each basic process unit from information held in the execution log, changes an arrangement structure so that a basic process unit with the calculated throughput exceeding a predetermined threshold is disposed in a hardware model, and performs a performance evaluation simulation on the hardware model and a software model to generate statistical information on which performance evaluation is based.

摘要翻译： 性能评估模拟装置基于执行日志将处理分为基本处理单元，根据执行日志中保存的信息计算每个基本处理单元的处理量，改变布置结构，使得计算出的吞吐量超过 在硬件模型中设置预定阈值，并对硬件模型和软件模型执行性能评估模拟，以生成基于性能评估的统计信息。