公开(公告)号：US06879509B2

公开(公告)日：2005-04-12

申请号：US10442832

申请日：2003-05-21

申请人： Donald A. Evans ,  Ross Alan Kohler ,  Nghia Q. Lam ,  Richard Joseph McPartland ,  Hai Quang Pham

发明人： Donald A. Evans ,  Ross Alan Kohler ,  Nghia Q. Lam ,  Richard Joseph McPartland ,  Hai Quang Pham

IPC分类号： G11C15/00 ,  G11C17/00 ,  G11C17/12 ,  H01L21/8246 ,  H01L27/112

CPC分类号： H01L27/112 ,  G11C17/12 ,  H01L27/11226

摘要： The present invention provides a read-only memory (ROM) architecture. An exemplary ROM array includes a plurality of columns, a plurality of rows, a first plurality of transistors or other switches representing a “0” data state or low voltage state, and a second plurality of transistors or other switches representing a “1” data state or high voltage state. Each transistor has a corresponding drain coupled to a column and a gate coupled to a row. Each transistor of the first plurality has a source coupled to a source voltage bus, and each transistor of the second plurality has a source not coupled to the source voltage bus, through use of a programmable contact window during fabrication. In various embodiments, for a selected column, drains of pair-wise adjacent transistors share a common drain-column contact and common diffusion region.

摘要翻译： 本发明提供一种只读存储器（ROM）架构。 示例性ROM阵列包括表示“0”数据状态或低电压状态的多个列，多行，第一多个晶体管或其他开关，以及表示“1”数据的第二多个晶体管或其他开关 状态或高电压状态。 每个晶体管具有耦合到列的相应漏极和耦合到一行的栅极。 第一多个晶体管的每个晶体管具有耦合到源极电压总线的源极，并且第二多个晶体管的每个晶体管通过在制造期间使用可编程接触窗口而具有未耦合到源极电压总线的源极。 在各种实施例中，对于所选择的列，成对相邻晶体管的漏极共享公共漏 - 列接触和公共扩散区。