SUPPORTING UN-BUFFERED MEMORY MODULES ON A PLATFORM CONFIGURED FOR REGISTERED MEMORY MODULES
    1.
    发明申请
    SUPPORTING UN-BUFFERED MEMORY MODULES ON A PLATFORM CONFIGURED FOR REGISTERED MEMORY MODULES 有权
    支持配置为注册内存模块的平台上的不间断存储器模块

    公开(公告)号:US20090089480A1

    公开(公告)日:2009-04-02

    申请号:US11863838

    申请日:2007-09-28

    CPC classification number: G11C5/04

    Abstract: A RDIMM enabled memory controller may support a UDIMM by way of a register chip and a PLL chip being implemented in operational relationship with a memory slot and a memory controller configured to support a RDIMM. The memory controller may drive address and control signals from the memory controller to the register chip, and the address and control signals may be provided from the register chip to the memory slot after one clock cycle, in response to the register chip latching onto the address and control signals from the memory controller on a rising clock edge.

    Abstract translation: 启用RDIMM的存储器控​​制器可以通过寄存器芯片来支持UDIMM,并且将PLL芯片与存储器插槽和与配置为支持RDIMM的存储器控​​制器的操作关系实现。 存储器控制器可以将地址和控制信号从存储器控制器驱动到寄存器芯片,并且地址和控制信号可以在一个时钟周期之后从寄存器芯片提供给存储器槽,以响应于寄存器芯片锁存到地址 并在上升时钟沿从存储器控制器控制信号。

    Supporting un-buffered memory modules on a platform configured for registered memory modules
    3.
    发明授权
    Supporting un-buffered memory modules on a platform configured for registered memory modules 有权
    在配置为已注册内存模块的平台上支持非缓冲内存模块

    公开(公告)号:US07861053B2

    公开(公告)日:2010-12-28

    申请号:US11863838

    申请日:2007-09-28

    CPC classification number: G11C5/04

    Abstract: A RDIMM enabled memory controller may support a UDIMM by way of a register chip and a PLL chip being implemented in operational relationship with a memory slot and a memory controller configured to support a RDIMM. The memory controller may drive address and control signals from the memory controller to the register chip, and the address and control signals may be provided from the register chip to the memory slot after one clock cycle, in response to the register chip latching onto the address and control signals from the memory controller on a rising clock edge.

    Abstract translation: 启用RDIMM的存储器控​​制器可以通过寄存器芯片来支持UDIMM,并且将PLL芯片与存储器插槽和与配置为支持RDIMM的存储器控​​制器的操作关系实现。 存储器控制器可以将地址和控制信号从存储器控制器驱动到寄存器芯片,并且地址和控制信号可以在一个时钟周期之后从寄存器芯片提供给存储器槽,以响应于寄存器芯片锁存到地址 并在上升时钟沿从存储器控制器控制信号。

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