IPSec acceleration using multiple micro engines
    1.
    发明申请
    IPSec acceleration using multiple micro engines 审中-公开
    使用多个微型引擎的IPSec加速

    公开(公告)号:US20050138366A1

    公开(公告)日:2005-06-23

    申请号:US10742512

    申请日:2003-12-19

    IPC分类号: H04L9/00 H04L29/06

    CPC分类号: H04L63/0485 H04L63/164

    摘要: A network forwarding device includes at least one physical interface, a framer and a network processor having multiple processing engines arranged as: a preparation stage provided on a first microengine of a processor having plural microengines the preparation stage to prepare the packet for processing, a processing stage provided on a second microengine of the processor, the processing stage to perform at least one crypto operation on the packet and a final stage provided on a third microengine of the processor to perform validate the packet in accordance with security associations and a switch fabric.

    摘要翻译: 网络转发装置包括至少一个物理接口,成帧器和具有多个处理引擎的网络处理器,所述处理引擎被布置为:准备阶段,其设置在具有多个微引擎的处理器的第一微引擎上,准备阶段用于准备用于处理的分组,处理 提供在处理器的第二微引擎上的处理阶段,处理阶段对分组执行至少一个加密操作,以及提供在处理器的第三微引擎上的最后阶段,以根据安全关联和交换结构执行验证分组。