公开(公告)号：US07143021B1

公开(公告)日：2006-11-28

申请号：US09969923

申请日：2001-10-03

申请人： Bruce W. McGaughy ,  Prashant Karhade ,  Peng Wan ,  Manish Singh

发明人： Bruce W. McGaughy ,  Prashant Karhade ,  Peng Wan ,  Manish Singh

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： A machine-implemented, simulations-supporting system creates a hierarchy of data structures for simplifying the task of identifying iso-topological, and iso-geometric, and iso-static instances of subcircuit-definitions. The behaviors of such isomorphic and iso-static instances can be simultaneously predicted by appointing a simulation leader for them and using the simulation leader in combination with a respective simulation model to predict the behavior of the simulation leader. The predicted behavior of the leader is then copied for the followers. In one embodiment, state-describing S-circuit cards each point to a respective, and possibly merged, I-circuit card. The I-circuit cards each point to respective, and possibly merged, element instantiating cards (AG-cards) as well as to respective, and possibly merged, interconnect-topology describing cards (T-circuits). If the handles (SH's) of two or more subcircuit parts point to a same, state-describing S-part, where the latter points to a merged I-circuit, and where the latter points to a merged T-circuit, then it can be determined by this that the respective subcircuit parts are both isomorphic and substantially iso-static and can therefore follow a commonly appointed leader. The disclosed system can be used with fully-flattened design definitions as well as with highly hierarchical design definitions.

摘要翻译： 机器实现的模拟支持系统创建数据结构的层次结构，用于简化识别子拓扑，异构几何和等静态实例的子电路定义的任务。 可以通过为他们指定一个模拟领导者并使用模拟领导者与各自的模拟模型结合来预测模拟领导者的行为来同时预测这种同构和异常静态实例的行为。 然后，为追随者复制领导者的预测行为。 在一个实施例中，状态描述S电路卡各自指向相应且可能合并的I电路卡。 I电路卡各自指向相应的并且可能合并的元件实例化卡（AG卡）以及相应且可能合并的互连拓扑描述卡（T形电路）。 如果两个或多个子电路部分的手柄（SH）指向相同的状态描述S部分，后者指向合并的I电路，并且后者指向合并的T形电路，那么它可以 由此确定各个子电路部件都是同构的并且基本上是等静电的，并且因此可以遵循通常指定的引导件。 所公开的系统可以使用完全平坦的设计定义以及高度层次化的设计定义。

公开(公告)号：US07181383B1

公开(公告)日：2007-02-20

申请号：US10724277

申请日：2003-11-26

申请人： Bruce W. McGaughy ,  Prashant Karhade ,  Jaideep Muhkerjee ,  Jun Kong

发明人： Bruce W. McGaughy ,  Prashant Karhade ,  Jaideep Muhkerjee ,  Jun Kong

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： A system for simulating a circuit having hierarchical data structure includes a simulator module having one or more computer programs for 1) creating a static database in accordance with a netlist description of the circuit, where the static database contains topology information of the circuit; 2) selecting a group circuit for simulation, where the group circuit contains one or more leaf circuits selected from the first branch and the second branch; 3) creating a dynamic database for representing the group circuit, where the dynamic database includes references to the static database for fetching topology information dynamically during simulation; and 4) simulating the group circuit in accordance with the dynamic database. Since the system duplicates and reproduces only the relevant dynamic information when necessary, the disclosed circuit simulator uses less memory and produces better performance.

摘要翻译： 一种用于模拟具有分层数据结构的电路的系统，包括具有一个或多个计算机程序的模拟器模块，用于1）根据电路的网表描述创建静态数据库，其中静态数据库包含电路的拓扑信息; 2）选择用于模拟的组电路，其中组电路包含从第一分支和第二分支选择的一个或多个叶子电路; 3）创建用于表示组电路的动态数据库，其中动态数据库包括对静态数据库的引用，用于在模拟期间动态地获取拓扑信息; 和4）根据动态数据库模拟组电路。 由于该系统在必要时仅复制并再现相关的动态信息，因此所公开的电路模拟器使用较少的存储器并产生更好的性能。