公开(公告)号：US20120176112A1

公开(公告)日：2012-07-12

申请号：US13082420

申请日：2011-04-08

申请人： Saumitra SINGH ,  Rupak Ghayal ,  Ravindra Kumar N

发明人： Saumitra SINGH ,  Rupak Ghayal ,  Ravindra Kumar N

IPC分类号： G05F1/10

CPC分类号： G05F1/573 ,  G05F3/26

摘要： A circuit for sensing load current of a voltage regulator. The circuit includes a power transistor and a minor transistor. A first transistor sizing circuit is coupled to the power transistor and is operable to control size of the power transistor based on a bias voltage of the power transistor, thereby regulating a first voltage for varying load conditions. The circuit also includes a feedback amplifier coupled to the power transistor and the mirror transistor. A transistor is coupled to the feedback amplifier and the mirror transistor. An analog to digital converter (ADC) is coupled to the transistor. A second transistor sizing circuit is coupled to the mirror transistor, the transistor, and the ADC. The second transistor sizing circuit is responsive to an output voltage to control size of the minor transistor, thereby ensuring that accuracy of output voltage sensed by ADC is not limited by ADC's resolution.

摘要翻译： 用于感测电压调节器的负载电流的电路。 电路包括功率晶体管和次级晶体管。 第一晶体管尺寸电路耦合到功率晶体管，并且可操作以基于功率晶体管的偏置电压来控制功率晶体管的尺寸，从而调节用于变化负载条件的第一电压。 电路还包括耦合到功率晶体管和反射镜晶体管的反馈放大器。 晶体管耦合到反馈放大器和反射镜晶体管。 模数转换器（ADC）耦合到晶体管。 第二晶体管尺寸电路耦合到镜像晶体管，晶体管和ADC。 第二晶体管尺寸电路响应于输出电压以控制次级晶体管的尺寸，从而确保ADC感测的输出电压的精度不受ADC的分辨率的限制。