公开(公告)号：US20120274393A1

公开(公告)日：2012-11-01

申请号：US13435210

申请日：2012-03-30

申请人： Carmelo Ucciardello ,  Antonino Conte ,  Giovanni Matranga ,  RosarioRoberto Grasso

发明人： Carmelo Ucciardello ,  Antonino Conte ,  Giovanni Matranga ,  RosarioRoberto Grasso

IPC分类号： G05F3/10

CPC分类号： H03K17/102 ,  H03K3/356113

摘要： A biasing circuit may include an input configured to receive a supply voltage, a value of which is higher than a limit voltage. The biasing circuit may also include a control stage configured to generate first and second control signals with mutually complementary values, equal alternatively to a first value, in a first half-period of a clock signal, or to a second value, in a second half-period of the clock signal. The first and second values may be a function of the supply and limit voltages. The biasing circuit may also include a biasing stage configured to generate a biasing voltage as a function of the values of the first and second control signals. The first and second control signals may control transfer transistors for transferring the supply voltage to respective outputs, while the biasing voltage may be for controlling protection transistors to reduce overvoltages on the transfer transistors.

摘要翻译： 偏置电路可以包括被配置为接收其值高于限制电压的电源电压的输入。 偏置电路还可以包括控制级，其被配置为在时钟信号的第一半个周期中产生第二和第二控制信号，该第一和第二控制信号具有相互互补的值，等于第一个值，或在第二个半个时钟信号中的第二个值 时钟信号的周期。 第一和第二值可以是电源和极限电压的函数。 偏置电路还可以包括被配置为产生作为第一和第二控制信号的值的函数的偏置电压的偏置级。 第一和第二控制信号可以控制用于将电源电压传送到各个输出的转移晶体管，而偏置电压可以用于控制保护晶体管以减小转移晶体管的过电压。