公开(公告)号：US20130328205A1

公开(公告)日：2013-12-12

申请号：US13490840

申请日：2012-06-07

Applicant: Globalfoundries Inc. ,  International Business Machines Corporation ,  STMircoelectronics Inc.

Inventor： Frank Johnson ,  Olivier Menut ,  Marc Tarabbia ,  Gregory A. Northrop

IPC: H01L23/52 ,  H01L21/768

CPC classification number: H01L27/0207 ,  H01L23/5286 ,  H01L27/11807 ,  H01L2027/11859 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, an integrated circuit includes a standard cell having a first boundary, a second boundary opposite the first boundary, a third boundary interconnecting the first and second boundaries, and a fourth boundary opposite the third boundary and interconnecting the first and second boundaries. The standard cell further includes parallel active areas extending from the first boundary to the second boundary. Also, the standard cell has parallel gate strips extending from the third boundary to the fourth boundary and over the active areas. A cut mask overlies the gate strips. An interconnect is positioned overlying the cut mask and forms an electrical connection with a selected gate strip.

Abstract translation: 提供了用于制造集成电路的集成电路和方法。 在一个实施例中，集成电路包括具有第一边界，与第一边界相反的第二边界，互连第一和第二边界的第三边界以及与第三边界相对的第四边界并互连第一和第二边界的标准单元。 标准单元还包括从第一边界延伸到第二边界的并行有效区域。 此外，标准单元具有从第三边界延伸到第四边界并且在有源区上延伸的平行栅极条。 切割掩模覆盖门条。 互连件定位在切割掩模上方并与选定的栅条形成电连接。