公开(公告)号：US20220326958A1

公开(公告)日：2022-10-13

申请号：US17717947

申请日：2022-04-11

申请人： Amlan Ganguly ,  Sai Manoj Pudukotai Dinakarrao ,  Mark Connolly ,  Purab Ranjan Sutradhar ,  Sathwika Bavikadi ,  Mark Allen Indovina

发明人： Amlan Ganguly ,  Sai Manoj Pudukotai Dinakarrao ,  Mark Connolly ,  Purab Ranjan Sutradhar ,  Sathwika Bavikadi ,  Mark Allen Indovina

IPC分类号： G06F9/38 ,  G06F9/50 ,  G06F9/30 ,  G06N3/063 ,  G06F12/0846

摘要： A processing element includes a PIM cluster configured to read data from and write data to an adjacent DRAM subarray, wherein the PIM cluster has a plurality of processing cores, each processing core of the plurality of processing cores containing a look-up table, and a router connected to each processing core, wherein the router is configured to communicate data among each processing core; and a controller unit configured to communicate with the router, wherein the controller unit contains an executable program of operational decomposition algorithms. The look-up tables can be programmable. A DRAM chip including a plurality of DRAM banks, each DRAM bank having a plurality of interleaved DRAM subarrays and a plurality of the PIM clusters configured to read data from and write data to an adjacent DRAM subarray is disclosed.