公开(公告)号：US07859341B2

公开(公告)日：2010-12-28

申请号：US12715424

申请日：2010-03-02

申请人： Akira Inoue ,  Seiko Goto ,  Kou Kanaya ,  Sinsuke Watanabe

发明人： Akira Inoue ,  Seiko Goto ,  Kou Kanaya ,  Sinsuke Watanabe

IPC分类号： H03F3/04

CPC分类号： H03F1/523 ,  H03F3/195 ,  H03F3/211 ,  H03F2200/211 ,  H03F2200/366 ,  H03F2200/381

摘要： A current limiting circuit is connected to the gate (input terminal) of an amplifying transistor. The current limiting circuit includes a protecting transistor, a first protecting resistor connecting the drain to the gate of the protecting transistor, and a second protecting resistor connecting the source to the gate of the protecting transistor. The current limiting circuit limits current, so that electric power larger than the maximum electric power allowable for the amplifying transistor does not pass.