Transistor, memory cell and method of manufacturing a transistor
    1.
    发明申请
    Transistor, memory cell and method of manufacturing a transistor 审中-公开
    晶体管,存储单元及制造晶体管的方法

    公开(公告)号:US20070176253A1

    公开(公告)日:2007-08-02

    申请号:US11343812

    申请日:2006-01-31

    IPC分类号: H01L29/00

    CPC分类号: H01L27/10876 H01L27/10867

    摘要: A transistor which can in particular be used in memory cells of a Dynamic Random Access Memory a memory cell and a method of manufacturing a transistor is disclosed. In one embodiment the transistor is a dual-fin field effect transistor. The transistor includes a first and a second source/drain regions, a channel connecting the first and second source/drain regions, a gate electrode for controlling an electrical current flowing between the first and second source/drain regions. The gate electrode is insulated from the channel by a gate dielectric, wherein the gate electrode is disposed in a gate groove extending in the substrate surface so that the channel comprises two fin-like channel portions extending between the first and second source/drain regions in a cross-sectional view taken perpendicularly to a line connecting the first and the second source/drain regions, the gate electrode delimiting each of the fin-like channel portions at one side thereof.

    摘要翻译: 公开了一种特别可用于动态随机存取存储器存储单元的存储单元的晶体管,以及制造晶体管的方法。 在一个实施例中,晶体管是双鳍场效应晶体管。 晶体管包括第一和第二源极/漏极区域,连接第一和第二源极/漏极区域的沟道,用于控制在第一和第二源极/漏极区域之间流动的电流的栅电极。 栅极通过栅极电介质与沟道绝缘,其中栅电极设置在在衬底表面中延伸的栅极沟槽中,使得沟道包括在第一和第二源极/漏极区之间延伸的两个鳍状沟道部分 垂直于连接第一和第二源极/漏极区域的线截取的截面图,栅极电极在其一侧限定每个鳍状沟道部分。