Detection apparatus
    1.
    发明授权
    Detection apparatus 失效
    检测装置

    公开(公告)号:US06678862B1

    公开(公告)日:2004-01-13

    申请号:US09806585

    申请日:2001-03-30

    IPC分类号: H03M1303

    摘要: A partial response maximum likelihood (PRML) bit detection apparatus is disclosed for deriving a bit sequence (xk) from an input information signal. The apparatus comprises input means for receiving the input information signal. The apparatus further comprises sampling means for sampling the input information signal at sampling instants so as to obtain samples (zk) of the information signal at said sampling instants. The apparatus also comprises calculating means (50, 70) for (a) calculating (50) at a sampling instant ti for one or more of a plurality of states sj (Sa, Sb, Sc) at said sampling instant, an optimum path metric value PM(sj,ti) and for determining for said one or more states a best predecessor state at the directly preceding sampling instant ti−1, a state at said sampling instant identifying a sequence of n subsequent bits. The apparatus further comprises calculating means for (b) establishing (70) the best path from the state at the said sampling instant ti having the lowest optimum path metric value, back in time towards the sampling instant ti−N via best predecessor states, established earlier for earlier sampling instants, to establish an optimum state at said sampling instant ti−N. The apparatus further comprises the calculating means for (c) outputting at least one bit (xk−MB−1) of said n bits of the sequence of bits corresponding to said established optimum state at said sampling instant ti−N. The steps (a) to (c) are repeated for a subsequent sampling instant ti+1. The apparatus is characterized in that mutually complementary sequences of n subsequent bits are allocated to the same state.

    摘要翻译: 公开了用于从输入信息信号导出比特序列(xk)的部分响应最大似然(PRML)比特检测装置。 该装置包括用于接收输入信息信号的输入装置。 该装置还包括用于在采样时刻对输入信息信号进行采样的采样装置,以便在所述采样时刻获得信息信号的采样(zk)。 所述装置还包括计算装置(50,70),用于(a)在所述采样时刻的多个状态sj(Sa,Sb,Sc)中的一个或多个的采样时刻ti计算(50)最佳路径度量 值PM(sj,ti),并且用于为所述一个或多个状态确定在直接在前的采样时刻ti-1处的最佳前置状态,所述采样时刻处的状态识别n个后续位的序列。 该装置还包括计算装置,用于(b)建立(70)从具有最低最优路径度量值的所述采样时刻ti的状态建立(70)最佳路径,经过最佳前置状态向时间向采样时刻ti-N建立 较早的采样时刻,以在所述采样时刻ti-N建立最佳状态。 该装置还包括计算装置,用于(c)在所述采样时刻ti-N处输出与所述建立的最佳状态相对应的比特序列的所述n比特的至少一个比特(xk-MB-1)。 对于随后的采样时刻ti + 1重复步骤(a)至(c)。 该装置的特征在于将n个后续比特的互补序列分配给相同的状态。