公开(公告)号：US08463843B2

公开(公告)日：2013-06-11

申请号：US11754940

申请日：2007-05-29

Applicant: Kartik Subbanna ,  Nitin Gupta ,  Adityashankar Kini ,  Daniel Conor O'Sullivan ,  Shashidhar Merugu ,  Steven James Procter ,  Vivasvat Manohar Keswani

Inventor： Kartik Subbanna ,  Nitin Gupta ,  Adityashankar Kini ,  Daniel Conor O'Sullivan ,  Shashidhar Merugu ,  Steven James Procter ,  Vivasvat Manohar Keswani

IPC: G06F15/16

CPC classification number: H04L47/10 ,  H04L47/266 ,  H04L47/323 ,  H04L47/33 ,  H04L49/90

Abstract: In a system where transactions are accelerated with asynchronous writes that require acknowledgements, with pre-acknowledging writes at a source of the writes, a destination-side transaction accelerator includes a queue for queue writes to a destination, at least some of the writes being pre-acknowledged by a source-side transaction accelerator prior to the write completing at the destination, a memory for storing a status of a destination-side queue and possibly other determinants, and logic for signaling to the source-side transaction accelerator with instructions to alter pre-acknowledgement rules to hold off on and pursue pre-acknowledgements based on the destination-side queue status. The rules can take into account adjusting the flow of pre-acknowledged requests or pre-acknowledgements at the sender-side transaction accelerator based at least on the computed logical length.

Abstract translation: 在使用需要确认的异步写入来加速交易的系统中，通过在写入的源处进行预确认写入，目的地侧事务加速器包括用于向目的地的队列写入的队列，至少一些写入是预先 在目的地写入完成之前由源侧事务加速器确认，用于存储目的地侧队列和可能的其他决定因素的状态的存储器以及用于向源侧事务加速器发信号的逻辑，其具有改变的指令 基于目的地端队列状态的预先确认规则来阻止和追踪预认证。 该规则可以考虑到至少基于所计算的逻辑长度来调整在发送方事务加速器处的预先确认的请求或预确认的流。