公开(公告)号：US4831593A

公开(公告)日：1989-05-16

申请号：US74852

申请日：1987-07-17

申请人： Taei Kubota ,  Tetsuo Nakano

发明人： Taei Kubota ,  Tetsuo Nakano

IPC分类号： G11C17/00 ,  G11C16/06 ,  G11C17/16

CPC分类号： G11C17/16

摘要： A semiconductor memory includes an array of memory cells wherein each memory cell is disposed at the intersection between a word line and a data line. An output line of the memory is coupled to the data line via transfer MOSFET and a data line signal detecting circuit, the latter being provided between the common data line and the output line. A precharging circuit for precharging the data line and a feedback circuit for coupling together the output and input sides of the data line signal detecting circuit are provided.

摘要翻译： 半导体存储器包括存储单元阵列，其中每个存储单元设置在字线和数据线之间的交点。 存储器的输出线通过传输MOSFET和数据线信号检测电路耦合到数据线，数据线信号检测电路设在公共数据线和输出线之间。 提供了用于对数据线进行预充电的预充电电路和用于将数据线信号检测电路的输出侧和输入侧耦合在一起的反馈电路。

公开(公告)号：US4903235A

公开(公告)日：1990-02-20

申请号：US349419

申请日：1989-05-09

申请人： Taei Kubota ,  Tetsuo Nakano

发明人： Taei Kubota ,  Tetsuo Nakano

IPC分类号： G11C17/00 ,  G11C16/06 ,  G11C17/16

CPC分类号： G11C17/16

摘要： A semiconductor memory includes an array of memory cells wherein each memory cell is disposed at the intersection between a word line and a data line. An output line of the memory is coupled to the data line via transfer MOSFET and a data line signal detecting circuit, the latter being provided between the common data line and the output line. A precharging circuit for precharging the data line and a feedback circuit for coupling together the output and input sides of the data line signal detecting circuit are provided.