公开(公告)号：US08402316B2

公开(公告)日：2013-03-19

申请号：US13086012

申请日：2011-04-13

申请人： Fumio Ichikawa ,  Tamoru Inoue

发明人： Fumio Ichikawa ,  Tamoru Inoue

IPC分类号： G06F11/00

CPC分类号： G06F11/3672

摘要： A method of testing a computer, the method has designating a register as an input-only register having a setting of a value which does not cause an exception interruption with an execution of a specific type of instruction, generating a test instruction array having a plurality of instructions for a test, by assigning a register excluding the input-only register as an output destination of an execution result of each of the plurality of instructions, executing the plurality of instructions included in the generated test instruction array, and evaluating the execution results by the computer.

摘要翻译： 一种测试计算机的方法，该方法指定寄存器作为仅输入寄存器，其具有不会因执行特定类型的指令而引起异常中断的值的设置，生成具有多个指令的测试指令阵列 通过分配除了仅输入寄存器之外的寄存器作为多个指令中的每一个的执行结果的输出目的地，执行包括在生成的测试指令数组中的多个指令，并评估执行结果 由电脑

公开(公告)号：US20110296147A1

公开(公告)日：2011-12-01

申请号：US13086012

申请日：2011-04-13

申请人： Fumio Ichikawa ,  Tamoru Inoue

发明人： Fumio Ichikawa ,  Tamoru Inoue

IPC分类号： G06F9/30 ,  G06F9/312

CPC分类号： G06F11/3672

摘要： A method of testing a computer, the method has designating a register as an input-only register having a setting of a value which does not cause an exception interruption with an execution of a specific type of instruction, generating a test instruction array having a plurality of instructions for a test, by assigning a register excluding the input-only register as an output destination of an execution result of each of the plurality of instructions, executing the plurality of instructions included in the generated test instruction array, and evaluating the execution results by the computer.

摘要翻译： 一种测试计算机的方法，该方法指定寄存器作为仅输入寄存器，其具有不会因执行特定类型的指令而引起异常中断的值的设置，生成具有多个指令的测试指令阵列 通过分配不包括仅输入寄存器的寄存器作为多个指令中的每一个的执行结果的输出目的地，执行包括在生成的测试指令数组中的多个指令，并评估执行结果 由电脑