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1.发明申请DATA PROCESSING DEVICE, CHAIN AND METHOD, AND CORRESPONDING COMPUTER PROGRAM 有权数据处理设备，链和方法以及相应的计算机程序公开(公告)号：US20130111079A1
公开(公告)日：2013-05-02
申请号：US13806852
申请日：2011-06-23
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： A data processing device includes a memory, a direct memory access controller including a receiving module configured to receive data coming from outside the device and for writing the data in a main buffer memory of the memory, and a processing unit programmed to read and process data written by the receiving module in a work area of the main buffer memory. The main buffer memory is divided between a used space, where the receiving module is configured not to write, and free space, where the receiving module is configured to write. The processing unit is further programmed to define the work area, and the direct memory access controller includes a buffer memory manager configured to free data written in the main buffer memory, by defining a location of this data as a free space, only when this data is outside the work area.
摘要翻译： 数据处理装置包括存储器，直接存储器访问控制器，其包括被配置为接收来自设备外部的数据并将数据写入存储器的主缓冲存储器的接收模块，以及被编程为读取和处理数据的处理单元 由接收模块在主缓冲存储器的工作区中写入。 主缓冲存储器在接收模块被配置为不写入的已用空间和接收模块配置为写入的可用空间之间划分。 处理单元还被编程为定义工作区域，并且直接存储器存取控制器包括缓冲存储器管理器，其被配置为通过将该数据的位置定义为自由空间来释放写入主缓冲存储器中的数据，只有当该数据 在工作区外。
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2.发明授权Data processing device, chain and method, and corresponding recording medium for dividing a main buffer memory into used space and free space 有权数据处理装置，链条和方法以及用于将主缓冲存储器分割成使用空间和可用空间的相应记录介质公开(公告)号：US08909823B2
公开(公告)日：2014-12-09
申请号：US13806852
申请日：2011-06-23
IPC分类号： G06F13/28
CPC分类号： G06F13/28
摘要： A data processing device includes a memory, a direct memory access controller including a receiving module configured to receive data coming from outside the device and for writing the data in a main buffer memory of the memory, and a processing unit programmed to read and process data written by the receiving module in a work area of the main buffer memory. The main buffer memory is divided between a used space, where the receiving module is configured not to write, and free space, where the receiving module is configured to write. The processing unit is further programmed to define the work area, and the direct memory access controller includes a buffer memory manager configured to free data written in the main buffer memory, by defining a location of this data as a free space, only when this data is outside the work area.
摘要翻译： 数据处理装置包括存储器，直接存储器访问控制器，其包括被配置为接收来自设备外部的数据并将数据写入存储器的主缓冲存储器的接收模块，以及被编程为读取和处理数据的处理单元 由接收模块在主缓冲存储器的工作区中写入。 主缓冲存储器在接收模块被配置为不写入的已用空间和接收模块配置为写入的可用空间之间划分。 处理单元还被编程为定义工作区域，并且直接存储器存取控制器包括缓冲存储器管理器，其被配置为通过将该数据的位置定义为自由空间来释放写入主缓冲存储器中的数据，只有当该数据 在工作区外。
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