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公开(公告)号：US20070206499A1
公开(公告)日：2007-09-06
申请号：US11686122
申请日：2007-03-14
IPC分类号： H04L12/56
CPC分类号： H04L49/205 , H04L12/5601 , H04L2012/5636 , H04L2012/568
摘要： The invention provides an ATM switch which realizes hierarchical shaping for each virtual channel and each virtual path with a simple configuration. Cells are sent from cell buffers of an ATM core switch by FIFO operation to output side connection information application sections of output side circuit interfaces. In each of the output side circuit interfaces, the output side connection information application section acquires connection information such as a service class based on an intra-switch connection identification number applied to each cell and applies the connection information to the cell. An output cell buffer queues cells for each virtual channel. A VC cell rate control section reads out cells from the output cell buffer in accordance with the connection information and performs traffic priority control and rate control of the cells to be outputted. Cells of each virtual channel are outputted at a rate equal to or higher than a minimum cell rate but equal to or lower than a peak cell rate in accordance with a VP cell rate control signal representative of the cell storage amount in a VP cell rate control section in the following stage. The VP cell rate control section queues cells into a buffer for each virtual path and performs traffic priority control and rate control of the cells.
摘要翻译： 本发明提供一种ATM交换机，其以简单的配置实现每个虚拟通道和每个虚拟路径的分层整形。 单元通过FIFO操作从ATM核心交换机的单元缓冲器发送到输出侧电路接口的输出端连接信息应用部分。 在每个输出侧电路接口中，输出侧连接信息应用部分基于应用于每个小区的交换机间连接识别号码来获取诸如服务类别的连接信息，并将该连接信息应用于该小区。 输出单元缓冲区为每个虚拟通道排队。 VC信元速率控制部根据连接信息从输出单元缓冲器读出单元，对要输出的单元进行流量优先控制和速率控制。 根据表示VP信元速率控制中的信元存储量的VP信元速率控制信号，以等于或高于最小信元速率但是等于或小于峰值信元速率的速率输出每个虚信道的信元 在下一阶段。 VP小区速率控制部分将小区排队到每个虚拟路径的缓冲器中，并且执行小区的业务优先级控制和速率控制。
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公开(公告)号：US07729251B2
公开(公告)日：2010-06-01
申请号：US11686122
申请日：2007-03-14
IPC分类号： H04L12/56
CPC分类号： H04L49/205 , H04L12/5601 , H04L2012/5636 , H04L2012/568
摘要： The invention provides an ATM switch which realizes hierarchical shaping for each virtual channel and each virtual path with a simple configuration. Cells are sent from cell buffers of an ATM core switch by FIFO operation to output side connection information application sections of output side circuit interfaces. In each of the output side circuit interfaces, the output side connection information application section acquires connection information such as a service class based on an intra-switch connection identification number applied to each cell and applies the connection information to the cell. An output cell buffer queues cells for each virtual channel. A VC cell rate control section reads out cells from the output cell buffer in accordance with the connection information and performs traffic priority control and rate control of the cells to be outputted. Cells of each virtual channel are outputted at a rate equal to or higher than a minimum cell rate but equal to or lower than a peak cell rate in accordance with a VP cell rate control signal representative of the cell storage amount in a VP cell rate control section in the following stage. The VP cell rate control section queues cells into a buffer for each virtual path and performs traffic priority control and rate control of the cells.
摘要翻译： 本发明提供一种ATM交换机，其以简单的配置实现每个虚拟通道和每个虚拟路径的分层整形。 单元通过FIFO操作从ATM核心交换机的单元缓冲器发送到输出侧电路接口的输出端连接信息应用部分。 在每个输出侧电路接口中，输出侧连接信息应用部分基于应用于每个小区的交换机间连接识别号码来获取诸如服务类别的连接信息，并将该连接信息应用于该小区。 输出单元缓冲区为每个虚拟通道排队。 VC信元速率控制部根据连接信息从输出单元缓冲器读出单元，对要输出的单元进行流量优先控制和速率控制。 根据表示VP信元速率控制中的信元存储量的VP信元速率控制信号，以等于或高于最小信元速率但是等于或小于峰值信元速率的速率输出每个虚信道的信元 在下一阶段。 VP小区速率控制部分将小区排队到每个虚拟路径的缓冲器中，并且执行小区的业务优先级控制和速率控制。
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公开(公告)号：US07209441B2
公开(公告)日：2007-04-24
申请号：US09929367
申请日：2001-08-15
IPC分类号： H04L12/56
CPC分类号： H04L49/205 , H04L12/5601 , H04L2012/5636 , H04L2012/568
摘要： The invention provides an ATM switch which realizes hierarchical shaping for each virtual channel and each virtual path with a simple configuration. Cells are sent from cell buffers of an ATM core switch by FIFO operation to output side connection information application sections of output side circuit interfaces. In each of the output side circuit interfaces, the output side connection information application section acquires connection information such as a service class based on an intra-switch connection identification number applied to each cell and applies the connection information to the cell. An output cell buffer queues cells for each virtual channel. A VC cell rate control section reads out cells from the output cell buffer in accordance with the connection information and performs traffic priority control and rate control of the cells to be outputted. Cells of each virtual channel are outputted at a rate equal to or higher than a minimum cell rate but equal to or lower than a peak cell rate in accordance with a VP cell rate control signal representative of the cell storage amount in a VP cell rate control section in the following stage. The VP cell rate control section queues cells into a buffer for each virtual path and performs traffic priority control and rate control of the cells.
摘要翻译： 本发明提供一种ATM交换机，其以简单的配置实现每个虚拟通道和每个虚拟路径的分层整形。 单元通过FIFO操作从ATM核心交换机的单元缓冲器发送到输出侧电路接口的输出端连接信息应用部分。 在每个输出侧电路接口中，输出侧连接信息应用部分基于应用于每个小区的交换机间连接识别号码来获取诸如服务类别的连接信息，并将该连接信息应用于该小区。 输出单元缓冲区为每个虚拟通道排队。 VC信元速率控制部根据连接信息从输出单元缓冲器读出单元，对要输出的单元进行流量优先控制和速率控制。 根据表示VP信元速率控制中的信元存储量的VP信元速率控制信号，以等于或高于最小信元速率但是等于或小于峰值信元速率的速率输出每个虚信道的信元 在下一阶段。 VP小区速率控制部分将小区排队到每个虚拟路径的缓冲器中，并且执行小区的业务优先级控制和速率控制。
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