公开(公告)号：US09858368B2

公开(公告)日：2018-01-02

申请号：US13182108

申请日：2011-07-13

申请人： Nathan C. Buck ,  Brian M. Dreibelbis ,  John P. Dubuque ,  Eric A. Foreman ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue Wang ,  Vladmimir Zolotov

发明人： Nathan C. Buck ,  Brian M. Dreibelbis ,  John P. Dubuque ,  Eric A. Foreman ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue Wang ,  Vladmimir Zolotov

IPC分类号： G06F17/50

CPC分类号： G06F17/5036 ,  G06F2217/84

摘要： Solutions for integrating manufacturing feedback into an integrated circuit design are disclosed. In one embodiment, a computer-implemented method is disclosed including: defining an acceptable yield requirement for a first integrated circuit product; obtaining manufacturing data about the first integrated circuit product; performing a regression analysis on data representing paths in the first integrated circuit product to define a plurality of parameter settings based upon the acceptable yield requirement and the manufacturing data; determining a projection corner associated with the parameter settings for satisfying the acceptable yield requirement; and modifying a design of a second integrated circuit product based upon the projection corner and the plurality of parameter settings.

公开(公告)号：US20130036395A1

公开(公告)日：2013-02-07

申请号：US13197320

申请日：2011-08-03

申请人： Eric A. Foreman ,  James C. Gregerson ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Debjit Sinha ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue Wang ,  Vladmimir Zolotov

发明人： Eric A. Foreman ,  James C. Gregerson ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Debjit Sinha ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue Wang ,  Vladmimir Zolotov

IPC分类号： G06F9/455 ,  G06F17/50

CPC分类号： G06F17/5031

摘要： Aspects of the present invention provide solutions for projecting slack in an integrated circuit. A statistical static timing analysis (SSTA) is computed to get a set of Gaussian distributions over a plurality of variation sources in the integrated circuit. Based on the Gaussian distributions, a truncated subset and a remainder subset of the Gaussian distributions are identified. Then data factors that represent a ratio between the remainder subset and the truncated subset are obtained. These data factors are applied to the SSTA to root sum square (RSS) project the slack for the integrated circuit that takes into account the absence of the truncated subset.

摘要翻译： 本发明的方面提供了用于在集成电路中突出松弛的解决方案。 计算统计静态时序分析（SSTA）以在集成电路中的多个变化源上获得一组高斯分布。 基于高斯分布，识别高斯分布的截断子集和余数子集。 然后获得表示余数子集和截断子集之间的比率的数据因子。 这些数据因子被应用于SSTA到根平方（RSS）项目，考虑到缺少截断子集的集成电路的松弛。

公开(公告)号：US20130018617A1

公开(公告)日：2013-01-17

申请号：US13182108

申请日：2011-07-13

申请人： Nathan C. Buck ,  Brian M. Dreibelbis ,  John P. Dubuque ,  Eric A. Foreman ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue Wang ,  Vladmimir Zolotov

发明人： Nathan C. Buck ,  Brian M. Dreibelbis ,  John P. Dubuque ,  Eric A. Foreman ,  Peter A. Habitz ,  Jeffrey G. Hemmett ,  Natesan Venkateswaran ,  Chandramouli Visweswariah ,  Xiaoyue Wang ,  Vladmimir Zolotov

IPC分类号： G06F19/00

CPC分类号： G06F17/5036 ,  G06F2217/84

摘要： Solutions for integrating manufacturing feedback into an integrated circuit design are disclosed. In one embodiment, a computer-implemented method is disclosed including: defining an acceptable yield requirement for a first integrated circuit product; obtaining manufacturing data about the first integrated circuit product; performing a regression analysis on data representing paths in the first integrated circuit product to define a plurality of parameter settings based upon the acceptable yield requirement and the manufacturing data; determining a projection corner associated with the parameter settings for satisfying the acceptable yield requirement; and modifying a design of a second integrated circuit product based upon the projection corner and the plurality of parameter settings.

摘要翻译： 公开了将制造反馈集成到集成电路设计中的解决方案。 在一个实施例中，公开了一种计算机实现的方法，包括：为第一集成电路产品定义可接受的收益率要求; 获取关于第一集成电路产品的制造数据; 对表示第一集成电路产品中的路径的数据执行回归分析，以基于可接受的产量要求和制造数据来定义多个参数设置; 确定与参数设置相关联的投影角以满足可接受的产量要求; 以及基于投影角和多个参数设置来修改第二集成电路产品的设计。