ESD protection with integrated LDMOS triggering junction
    1.
    发明授权
    ESD protection with integrated LDMOS triggering junction 有权
    集成LDMOS触发结的ESD保护

    公开(公告)号:US09583603B2

    公开(公告)日:2017-02-28

    申请号:US13764523

    申请日:2013-02-11

    摘要: An electrostatic discharge (ESD) protection device includes a semiconductor substrate, a base region in the semiconductor substrate and having a first conductivity type, an emitter region in the base region and having a second conductivity type, a collector region in the semiconductor substrate, spaced from the base region, and having the second conductivity type, a breakdown trigger region having the second conductivity type, disposed laterally between the base region and the collector region to define a junction across which breakdown occurs to trigger the ESD protection device to shunt ESD discharge current, and a gate structure supported by the semiconductor substrate over the breakdown trigger region and electrically tied to the base region and the emitter region. The lateral width of the breakdown trigger region is configured to establish a voltage level at which the breakdown occurs.

    摘要翻译: 静电放电(ESD)保护装置包括半导体衬底,半导体衬底中的基极区域,具有第一导电类型,基极区域中的发射极区域,具有第二导电类型,半导体衬底中的集电极区域间隔开 具有第二导电类型的具有第二导电类型的击穿触发区域横向设置在基极区域和集电极区域之间以限定发生击穿的结,以触发ESD保护装置以分流ESD放电 电流以及由击穿触发区域上的半导体衬底支撑并电连接到基极区域和发射极区域的栅极结构。 击穿触发区域的横向宽度被配置为建立发生击穿的电压电平。

    ESD PROTECTION WITH INTEGRATED LDMOS TRIGGERING JUNCTION
    2.
    发明申请
    ESD PROTECTION WITH INTEGRATED LDMOS TRIGGERING JUNCTION 有权
    具有集成LDMOS触发接点的ESD保护

    公开(公告)号:US20140225156A1

    公开(公告)日:2014-08-14

    申请号:US13764523

    申请日:2013-02-11

    IPC分类号: H01L27/02 H01L29/66 H01L29/73

    摘要: An electrostatic discharge (ESD) protection device includes a semiconductor substrate, a base region in the semiconductor substrate and having a first conductivity type, an emitter region in the base region and having a second conductivity type, a collector region in the semiconductor substrate, spaced from the base region, and having the second conductivity type, a breakdown trigger region having the second conductivity type, disposed laterally between the base region and the collector region to define a junction across which breakdown occurs to trigger the ESD protection device to shunt ESD discharge current, and a gate structure supported by the semiconductor substrate over the breakdown trigger region and electrically tied to the base region and the emitter region. The lateral width of the breakdown trigger region is configured to establish a voltage level at which the breakdown occurs.

    摘要翻译: 静电放电(ESD)保护装置包括半导体衬底,半导体衬底中的基极区域,具有第一导电类型,基极区域中的发射极区域,具有第二导电类型,半导体衬底中的集电极区域间隔开 具有第二导电类型的具有第二导电类型的击穿触发区域横向设置在基极区域和集电极区域之间以限定发生击穿的结,以触发ESD保护装置以分流ESD放电 电流以及由击穿触发区域上的半导体衬底支撑并电连接到基极区域和发射极区域的栅极结构。 击穿触发区域的横向宽度被配置成建立发生击穿的电压电平。