Universal image processing
    1.
    发明授权
    Universal image processing 有权
    通用图像处理

    公开(公告)号:US07876940B2

    公开(公告)日:2011-01-25

    申请号:US11668875

    申请日:2007-01-30

    IPC分类号: G06K9/00

    摘要: The present invention provides a universal and centralized image (e.g., medical, bio-molecular, etc.) processing system platform. The invention permits sharing both computation and visualization across a single universal platform, thus allowing for sharing of computing resources and visualization of images on a variety of imaging (client) devices without high-performance graphical display cards. In a typical embodiment a (e.g., medical) image 2D linear registration algorithm is implemented on a Cell Broadband Engine processor, which has nine processor cores on a chip and has a 4-way SIMD unit for each core.

    摘要翻译: 本发明提供了一种通用且集中的图像(例如医疗,生物分子等)处理系统平台。 本发明允许在单个通用平台上共享计算和可视化,从而允许在不具有高性能图形显示卡的各种成像(客户端)设备上共享计算资源和可视化图像。 在典型的实施例中,在Cell Broadband Engine处理器上实现(例如,医学)图像2D线性注册算法,该处理器在芯片上具有九个处理器核心,并且具有用于每个核心的4路SIMD单元。

    UNIVERSAL IMAGE PROCESSING
    2.
    发明申请
    UNIVERSAL IMAGE PROCESSING 有权
    通用图像处理

    公开(公告)号:US20080181471A1

    公开(公告)日:2008-07-31

    申请号:US11668875

    申请日:2007-01-30

    IPC分类号: G06K9/00

    摘要: The present invention provides a universal and centralized image (e.g., medical, bio-molecular, etc.) processing system platform. The invention permits sharing both computation and visualization across a single universal platform, thus allowing for sharing of computing resources and visualization of images on a variety of imaging (client) devices without high-performance graphical display cards. In a typical embodiment a (e.g., medical) image 2D linear registration algorithm is implemented on a Cell Broadband Engine processor, which has nine processor cores on a chip and has a 4-way SIMD unit for each core.

    摘要翻译: 本发明提供了一种通用且集中的图像(例如医疗,生物分子等)处理系统平台。 本发明允许在单个通用平台上共享计算和可视化,从而允许在不具有高性能图形显示卡的各种成像(客户端)设备上共享计算资源和可视化图像。 在典型的实施例中,在Cell Broadband Engine处理器上实现(例如,医学)图像2D线性注册算法,该处理器在芯片上具有九个处理器核心,并且具有用于每个核心的4路SIMD单元。