公开(公告)号：US07075156B1

公开(公告)日：2006-07-11

申请号：US10988382

申请日：2004-11-12

申请人： Choy Li ,  Xin-Yi Zhang

发明人： Choy Li ,  Xin-Yi Zhang

IPC分类号： H01L23/62 ,  H01L27/082

CPC分类号： H01L27/0277 ,  H01L2924/0002 ,  H01L2924/00

摘要： Electrostatic discharge (ESD) devices for protection of integrated circuits are described. ESD devices may be configured to provide uniform breakdown of finger regions extending through a first region of a substrate having a first conductivity type and into a second region of the substrate more lightly doped with impurities of the first conductivity type. Such an EDS device may include a collector region having a middle region highly doped with impurities of the first conductivity type. The middle region may be proximate to a layer that is lightly doped with impurities of the first conductivity type and a layer that is doped with impurities of the second conductivity type. The collector region may decrease the breakdown voltage of the EDS device. The lightly doped region may be eliminated in the collector region and an interlayer insulating layer is formed in contact with the top side regions and the middle region.

摘要翻译： 描述了用于集成电路保护的静电放电（ESD）器件。 ESD器件可以被配置为提供延伸穿过具有第一导电类型的衬底的第一区域的指状区域的均匀击穿，并且进一步轻微地掺杂有第一导电类型的杂质的衬底的第二区域。 这种EDS器件可以包括具有高掺杂有第一导电类型的杂质的中间区域的集电极区域。 中间区域可以接近轻掺杂第一导电类型的杂质的层和掺杂有第二导电类型的杂质的层。 集电极区域可能会降低EDS器件的击穿电压。 可以在集电极区域中去除轻掺杂区域，并且形成与顶侧区域和中间区域接触的层间绝缘层。

公开(公告)号：US06818955B1

公开(公告)日：2004-11-16

申请号：US10412076

申请日：2003-04-09

申请人： Choy Hing Li ,  Xin Yi Zhang

发明人： Choy Hing Li ,  Xin Yi Zhang

IPC分类号： H01L2362

CPC分类号： H01L27/0277 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrostatic discharge device may provide better protection of an integrated circuit by more uniform breakdown of a plurality of finger regions. The plurality of finger regions may extend through a first region of a substrate having a first conductivity type and into a second region of the substrate more lightly doped with impurities of the first conductivity type. An electrostatic discharge device may include a collector region having a middle region that may be highly doped with impurities of the first conductivity type. The middle region may be proximate to a layer that is lightly doped with impurities of the first conductivity type and a layer that is doped with impurities of the second conductivity type. The collector region may decrease the breakdown voltage of the electrostatic discharge device.

摘要翻译： 静电放电装置可以通过多个手指区域的更均匀的击穿来提供对集成电路的更好的保护。 多个指状区域可以延伸穿过具有第一导电类型的衬底的第一区域，并且进一步轻掺杂有第一导电类型的杂质的衬底的第二区域。 静电放电装置可以包括具有可以高度掺杂有第一导电类型的杂质的中间区域的集电极区域。 中间区域可以接近轻掺杂第一导电类型的杂质的层和掺杂有第二导电类型的杂质的层。 集电极区域可以降低静电放电装置的击穿电压。

公开(公告)号：US5850095A

公开(公告)日：1998-12-15

申请号：US719195

申请日：1996-09-24

申请人： Julian Zhiliang Chen ,  Xin Yi Zhang ,  Thomas A. Vrotsos ,  Ajith Amerasekera

发明人： Julian Zhiliang Chen ,  Xin Yi Zhang ,  Thomas A. Vrotsos ,  Ajith Amerasekera

IPC分类号： H01L27/02 ,  H01L23/62

CPC分类号： H01L27/0248

摘要： The present invention provides a high efficiency ESD circuit that requires less space through uniform activation of multiple emitter fingers of a transistor structure containing an integral Zener diode. The Zener diode is able to lower the protection circuit trigger threshold from around 18 volts to around 7 volts. This method minimizes series impedance of the signal path, thereby rendering an NPN structure that is particularly well suited for protecting bipolar and CMOS input and output buffers. The ESD circuit of the present invention provides a relatively low shunt capacitance (typically

摘要翻译： 本发明提供了一种高效率的ESD电路，其通过均匀地激活包含整流齐纳二极管的晶体管结构的多个发射极指，需要更少的空间。 齐纳二极管能够将保护电路触发阈值从大约18伏降低到大约7伏。 该方法使信号路径的串联阻抗最小化，从而使得NPN结构特别适用于保护双极和CMOS输入和输出缓冲器。 本发明的ESD电路提供对当前和未来考虑的亚微米双极/ BiCMOS电路的输入和输出电路所需的相对较低的并联电容（通常<0.5pF）和串联电阻（通常<0.5欧姆） 过程。

公开(公告)号：US06987301B1

公开(公告)日：2006-01-17

申请号：US10412099

申请日：2003-04-09

申请人： Xin Yi Zhang ,  Choy Hing Li

发明人： Xin Yi Zhang ,  Choy Hing Li

IPC分类号： H01L23/62

CPC分类号： H01L27/0259 ,  H01L2924/0002 ,  H01L2924/00

摘要： An electrostatic discharge device may provide better protection of an integrated circuit by more uniform breakdown of a plurality of finger regions. The plurality of finger regions may extend through a first region of a substrate having a first conductivity type and into a second region of the substrate more lightly doped with impurities of the first conductivity type. An electrostatic discharge device may include a collector region having a middle region that may be highly doped with impurities of the first conductivity type. The middle region may be proximate to a layer that is lightly doped with impurities of the first conductivity type and a layer that is doped with impurities of the second conductivity type. The collector region may decrease the breakdown voltage of the electrostatic discharge device.

摘要翻译： 静电放电装置可以通过多个手指区域的更均匀的击穿来提供对集成电路的更好的保护。 多个指状区域可以延伸穿过具有第一导电类型的衬底的第一区域，并且进一步轻掺杂有第一导电类型的杂质的衬底的第二区域。 静电放电装置可以包括具有可以高度掺杂有第一导电类型的杂质的中间区域的集电极区域。 中间区域可以接近轻掺杂第一导电类型的杂质的层和掺杂有第二导电类型的杂质的层。 集电极区域可以降低静电放电装置的击穿电压。

公开(公告)号：US20100096272A1

公开(公告)日：2010-04-22

申请号：US12546817

申请日：2009-08-25

申请人： SONG QING GUO ,  Xin Yi Zhang

发明人： SONG QING GUO ,  Xin Yi Zhang

IPC分类号： C25D7/00 ,  C25D1/00

CPC分类号： C25D1/00 ,  C25D3/48

摘要： A processing technique of electroforming for hard pure gold accessories, including carving waxwork, making silica molding, grafting wax, trimming wax, oiling, electroforming, wax removing and quality inspection, characterized in that LJJAS compounding agent was added to the electrolytic solution, the electroforming temperature is between 50 to 60 degrees, the electroforming speed is 0.05 g/h and pH value of electrolytic solution is between 7.0 to 7.5. Thus, even distribution, strong covering capacity, thin coating, short molding time, big size, lighy weight and high hardness can be achieved. This processing technique is particularly suitable to the gold processing industry.

摘要翻译： 一种用于硬质纯金配件的电铸加工技术，包括雕刻蜡，制作二氧化硅成型，接枝蜡，修剪蜡，上油，电铸，除蜡和质量检验，其特征在于将LJJAS配混剂加入到电解液中，电铸 温度在50〜60度之间，电铸速度为0.05g / h，电解液的pH值为7.0〜7.5。 因此，可以实现均匀分布，覆盖能力强，涂层薄，成型时间短，尺寸大，重量轻，硬度高等优点。 这种加工技术特别适用于黄金加工业。