公开(公告)号：US08356267B2

公开(公告)日：2013-01-15

申请号：US12912819

申请日：2010-10-27

申请人： Vikas Agarwal ,  Yonatan Mittlefehldt ,  Jafar Nahidi

发明人： Vikas Agarwal ,  Yonatan Mittlefehldt ,  Jafar Nahidi

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： An integrated circuit design is routed by first creating temporary routes in a flattened layout, generating blockage information for sub-blocks in the layout based on the temporary routes, and establishing a routing order for cells using a depth-first search. Cells in the original layout are then routed according to the routing order using the blockage information. The temporary routes are sorted into internal routes, terminal routes, and spanning routes. Blockage information for each sub-block includes a first cellview equal to the internal routes, a second cellview equal to the terminal routes plus the spanning routes, and a third cellview equal to the total tracks in the sub-block minus the first and second cellviews. The invention is particularly suited for routing a hierarchical integrated circuit design. By examining the complete hierarchy, the invention ensures that enough metal will be remaining at upper level sub-blocks to complete the routing automatically.

摘要翻译： 通过首先在平坦化布局中创建临时路由来路由集成电路设计，基于临时路由生成布局中的子块的阻塞信息，以及使用深度优先搜索来建立小区的路由顺序。 然后使用阻塞信息，根据路由顺序路由原始布局中的单元。 临时路由分为内部路由，终端路由和跨越路由。 每个子块的阻塞信息包括等于内部路由的第一小区视图，等于终端路由加上跨越路由的第二小区视图，以及等于子块中的总轨迹的第三小区视图减去第一和第二小区视图 。 本发明特别适用于布线分级集成电路设计。 通过检查完整的层次结构，本发明确保在上级子块中剩余足够的金属以自动完成路由。

公开(公告)号：US20120110536A1

公开(公告)日：2012-05-03

申请号：US12912819

申请日：2010-10-27

申请人： Vikas Agarwal ,  Yonatan Mittlefehldt ,  Jafar Nahidi

发明人： Vikas Agarwal ,  Yonatan Mittlefehldt ,  Jafar Nahidi

IPC分类号： G06F17/50

CPC分类号： G06F17/5077

摘要： An integrated circuit design is routed by first creating temporary routes in a flattened layout, generating blockage information for sub-blocks in the layout based on the temporary routes, and establishing a routing order for cells using a depth-first search. Cells in the original layout are then routed according to the routing order using the blockage information. The temporary routes are sorted into internal routes, terminal routes, and spanning routes. Blockage information for each sub-block includes a first cellview equal to the internal routes, a second cellview equal to the terminal routes plus the spanning routes, and a third cellview equal to the total tracks in the sub-block minus the first and second cellviews. The invention is particularly suited for routing a hierarchical integrated circuit design. By examining the complete hierarchy, the invention ensures that enough metal will be remaining at upper level sub-blocks to complete the routing automatically.

摘要翻译： 通过首先在平坦化布局中创建临时路由来路由集成电路设计，基于临时路由生成布局中的子块的阻塞信息，以及使用深度优先搜索来建立小区的路由顺序。 然后使用阻塞信息，根据路由顺序路由原始布局中的单元。 临时路由分为内部路由，终端路由和跨越路由。 每个子块的阻塞信息包括等于内部路由的第一小区视图，等于终端路由加上跨越路由的第二小区视图，以及等于子块中的总轨迹的第三小区视图减去第一和第二小区视图 。 本发明特别适用于布线分级集成电路设计。 通过检查完整的层次结构，本发明确保在上级子块中剩余足够的金属以自动完成路由。