Signal processor
    2.
    发明申请
    Signal processor 审中-公开
    信号处理器

    公开(公告)号:US20050195890A1

    公开(公告)日:2005-09-08

    申请号:US10508846

    申请日:2002-05-29

    IPC分类号: G06F11/10 G06F11/22 H04B1/38

    CPC分类号: G06F11/1008 G06F11/3648

    摘要: A signal processor for a mobile communication system including a plurality of function blocks for signal processing directed to facilitating debugging. A signal processor 100 includes primary function blocks such as an error correction coder block 102, a modulator block 104, a demodulator block 202, an error correction decoder block 204, and an MPU 302. More particularly, the signal processor 100 outputs debug information in an arbitrary data length along with time information serially from an arbitrary function block, based on an instruction from an outside, through signal lines 404(1)˜404(I), 404(1)˜404(J), 404(1)˜404(K), 404(1)˜404(L) connected to each function block, a selection multiplex output block 403, and a selection multiplex output signal line 402. Hence, a debugger 401 specifies a function block where a failure occurs and specifies the timing of a failure occurrence.

    摘要翻译: 一种用于移动通信系统的信号处理器,包括用于促进调试的信号处理的多个功能块。 信号处理器100包括诸如纠错编码器块102,调制器块104,解调器块202,纠错解码器块204和MPU 302的主要功能块。 更具体地,信号处理器100通过信号线404(1)〜404(I),404(1)从基于来自外部的指令,从任意功能块串行地输出任意数据长度的调试信息 )〜404(J),404(1)〜404(K),404(1)〜404(L),选择多路复用输出块403和选择多路复用输出信号线402。 因此,调试器401指定发生故障的功能块,并指定故障发生的定时。