公开(公告)号：US07256797B2

公开(公告)日：2007-08-14

申请号：US10766636

申请日：2004-01-28

申请人： Yoshiji Yoshida

发明人： Yoshiji Yoshida

IPC分类号： G09G5/00 ,  G06F13/00

CPC分类号： G09G5/26 ,  G06T15/005 ,  G09G5/393 ,  G09G5/399 ,  G09G2340/02 ,  Y10S345/95

摘要： An image processing device comprises a decoder, a sprite buffer interface, and a sprite buffer as well as a rendering engine, a frame buffer interface, and a frame buffer, which is characterized by synchronizing the write timing for the sprite buffer with the read timing for the frame buffer. That is, the decoder decodes compressed image data to restore original image data before compression. The sprite buffer interface writes the decoded data (i.e., sprite pattern data) into the sprite buffer, from which the sprite pattern data are read and supplied to the rendering engine. The rendering engine performs a prescribed rendering process (e.g., magnification, reduction, rotation, deformation, etc.) on the sprite pattern data, which are then written into the frame buffer. A display controller reads rendering-completed data (i.e., display data) from the frame buffer so as to output them to a display.

摘要翻译： 图像处理装置包括解码器，子画面缓冲器接口和子画面缓冲器以及渲染引擎，帧缓冲器接口和帧缓冲器，其特征在于将子画面缓冲器的写入定时与读取定时同步 对于帧缓冲区。 也就是说，解码器解压缩压缩的图像数据以在压缩之前恢复原始图像数据。 子画面缓冲器接口将解码数据（即，子画面图案数据）写入子画面缓冲器中，精灵图案数据从该子画面缓冲器读取并提供给渲染引擎。 呈现引擎对子画面图案数据执行规定的渲染处理（例如，放大，缩小，旋转，变形等），然后写入帧缓冲器。 显示控制器从帧缓冲器读取渲染完成数据（即，显示数据），以便将它们输出到显示器。

公开(公告)号：US5765025A

公开(公告)日：1998-06-09

申请号：US542729

申请日：1995-10-13

申请人： Minoru Morimoto ,  Yoshiji Yoshida

发明人： Minoru Morimoto ,  Yoshiji Yoshida

IPC分类号： G06F9/34 ,  G06F9/38 ,  G06F9/30

CPC分类号： G06F9/3824 ,  G06F9/34

摘要： There is provided a method of controlling direct memory access for a digital signal-processing system. Direct memory access (DMA) instructions for executing data transfer by direct memory access between a data memory storing data and an external device are provided in a program, together with arithmetic processing instructions for executing arithmetic processing. The data transfer by the direct memory access is executed between the data memory and the external device according to each of the DMA instructions which has been decoded during execution of the program, upon decoding thereof. There is also provided a digital signal-processing system which causes data transfer by direct memory access to begin. An arithmetic operation device of the system arithmetically processes data read out from a data memory of the same under the control of decoded instructions of a program. The program contains DMA instructions for executing the data transfer by the direct memory access as well as arithmetic processing instructions. The data transfer by the direct memory access between an external device and the data memory is started when each of the DMA instructions is decoded during execution of the program.

摘要翻译： 提供了一种控制数字信号处理系统的直接存储器访问的方法。 与存储数据和外部设备的数据存储器之间的直接存储器访问执行数据传送的直接存储器访问（DMA）指令与用于执行算术处理的算术处理指令一起被提供在程序中。 通过直接存储器访问的数据传输，在数据存储器和外部设备之间根据在程序执行期间被解码的每个DMA指令执行。 还提供了一种数字信号处理系统，其通过直接存储器访问来开始数据传输。 该系统的算术运算装置在程序的解码指令的控制下，对从数据存储器读出的数据进行算术处理。 该程序包含用于通过直接存储器访问执行数据传输的DMA指令以及算术处理指令。 当在程序执行期间对每个DMA指令进行解码时，开始在外部设备与数据存储器之间进行直接存储器访问的数据传输。