公开(公告)号：US6160729A

公开(公告)日：2000-12-12

申请号：US162608

申请日：1998-09-29

申请人： Stefan Jung ,  Roland Thewes ,  Werner Weber ,  Andreas Luck, deceased ,  by Manfred Luck, heir ,  by Inge Booken, heir

发明人： Stefan Jung ,  Roland Thewes ,  Werner Weber ,  Andreas Luck, deceased ,  by Manfred Luck, heir ,  by Inge Booken, heir

IPC分类号： G11C15/04 ,  G11C7/00

CPC分类号： G11C15/046

摘要： An associative memory contains cells that are formed of a series circuit of an ordinary PMOS transistor with a PMOS transistor with a floating gate. The ordinary PMOS transistor receives of an input vector and the gate of the second PMOS transistor is connected to a learning input. For the associative access, a second vector can be applied to the drain terminal of the second PMOS transistor and, upon readout, the current flow through the respective series circuit is evaluated column-by-column by current evaluator circuits.

摘要翻译： 相关存储器包含由具有带浮置栅极的PMOS晶体管的普通PMOS晶体管的串联电路形成的单元。 普通PMOS晶体管接收输入矢量，第二PMOS晶体管的栅极连接到学习输入端。 对于关联访问，第二向量可以被施加到第二PMOS晶体管的漏极端子，并且在读出时，通过电流评估器电路逐列地评估通过各个串联电路的电流。