公开(公告)号：US20160105194A1

公开(公告)日：2016-04-14

申请号：US14511613

申请日：2014-10-10

Applicant: ANALOG DEVICES TECHNOLOGY

Inventor： MAHESH MADHAVAN KUMBARANTHODIYIL ,  Sandeep Monangi

IPC: H03M1/12

CPC classification number: H03M1/1245 ,  H03M1/122 ,  H03M1/466

Abstract: In an example embodiment, an analog to digital converter (ADC) facilitating passive analog sample and hold is provided and includes a pair of binary weighted conversion capacitor arrays, a pair of sampling capacitors, and a plurality of switches that configure each conversion capacitor array and the sampling capacitors for a sampling phase, a charge transfer phase, and a bit trial phase. During the sampling phase, the sampling capacitors are decoupled from the conversion capacitors and coupled to an analog input voltage. During the charge transfer phase, the sampling capacitors are coupled to the conversion capacitors and decoupled from the analog input voltage. During the bit trial phase, the sampling capacitors are decoupled from the conversion capacitors.

Abstract translation: 在示例实施例中，提供了一种促进被动模拟采样和保持的模数转换器（ADC），并且包括一对二进制加权转换电容器阵列，一对采样电容器和配置每个转换电容器阵列的多个开关 用于采样相位的采样电容器，电荷转移阶段和位试验阶段。 在采样阶段，采样电容器与转换电容器分离并耦合到模拟输入电压。 在电荷转移阶段期间，采样电容器耦合到转换电容器并与模拟输入电压分离。 在位试验阶段，采样电容器与转换电容器分离。