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公开(公告)号:US10854560B2
公开(公告)日:2020-12-01
申请号:US16502803
申请日:2019-07-03
Applicant: AOI Electronics Co., Ltd. , Mitsubishi Electric Corporation
Inventor: Shuichi Sawamoto , Koji Iwabu , Katsuhiro Takao , Akihito Hirai , Joichi Saito
IPC: H01L23/552 , H01L23/31 , H01L21/56 , H01L23/00 , H01L21/48 , H01L23/495
Abstract: A semiconductor device includes: an island that is formed by a metallic layer including a single metallic layer or a plurality of different metallic layers; a semiconductor chip provided upon an upper surface of the island, and having a pair of side portions mutually opposing each other; a plurality of signal terminals disposed at an external periphery of at least the pair of side portions of the semiconductor chip, and formed by the metallic layer; a grounding terminal disposed at an external periphery of the plurality of signal terminals, and formed by the metallic layer; electrically conductive connection members that are connected between each of a plurality of electrodes of the semiconductor chip and each of the plurality of signal terminals; sealing resin that seals the island, the semiconductor chip, the electrically conductive connection members, the plurality of signal terminals, and the grounding terminal, so that a lower surface of the island, lower surfaces of the plurality of signal terminals, and a lower surface of the grounding terminal are exposed to the exterior; and a metallic shielding layer that covers over an outer peripheral side surface and an upper surface of the sealing resin, and a portion of the grounding terminal.
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公开(公告)号:US10854557B2
公开(公告)日:2020-12-01
申请号:US15742071
申请日:2016-05-19
Applicant: AOI Electronics Co., Ltd. , Mitsubishi Electric Corporation
Inventor: Shuichi Sawamoto , Koji Iwabu , Katsuhiro Takao , Akihito Hirai , Joichi Saito
IPC: H01L21/56 , H01L23/552 , H01L23/31 , H01L23/00 , H01L21/48 , H01L23/495
Abstract: A semiconductor device includes: an island that is formed by a metallic layer including a single metallic layer or a plurality of different metallic layers; a semiconductor chip provided upon an upper surface of the island, and having a pair of side portions mutually opposing each other; a plurality of signal terminals disposed at an external periphery of at least the pair of side portions of the semiconductor chip, and formed by the metallic layer; a grounding terminal disposed at an external periphery of the plurality of signal terminals, and formed by the metallic layer; electrically conductive connection members that are connected between each of a plurality of electrodes of the semiconductor chip and each of the plurality of signal terminals; sealing resin that seals the island, the semiconductor chip, the electrically conductive connection members, the plurality of signal terminals, and the grounding terminal, so that a lower surface of the island, lower surfaces of the plurality of signal terminals, and a lower surface of the grounding terminal are exposed to the exterior; and a metallic shielding layer that covers over an outer peripheral side surface and an supper surface of the sealing resin, and a portion of the grounding terminal.
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