公开(公告)号：US09024699B2

公开(公告)日：2015-05-05

申请号：US13746247

申请日：2013-01-21

Applicant: Apple Inc.

Inventor： Kleanthes G. Koniaris ,  Erik P. Machnicki ,  Shane J. Keil

IPC: H03K3/64

CPC classification number: H03K3/64

Abstract: Various techniques for generating an output clock based on a reference clock. This disclosure relates to generating an output clock signal based on a reference clock signal. In one embodiment, a method includes generating, using information received from a control circuit, an output clock signal using both a first number of edges or an input clock signal and a second, different number of edges of the input clock signal. In this embodiment, the control circuit runs at a frequency that is less than a frequency of the input clock signal. The received information may indicate, for a pulse of the output clock signal, whether the pulse should be generated using the first number of edges or the second number of edges. In some cases, the second number of edges may be the first number of edges plus one. The first and second number of edges may be programmable quantities.

Abstract translation: 用于基于参考时钟产生输出时钟的各种技术。 本公开涉及基于参考时钟信号产生输出时钟信号。 在一个实施例中，一种方法包括：使用从控制电路接收的信息，使用输入时钟信号的第一数量的边缘或输入时钟信号和第二不同数量的边缘来产生输出时钟信号。 在本实施例中，控制电路的运行频率小于输入时钟信号的频率。 接收到的信息可以针对输出时钟信号的脉冲来指示是否应该使用第一数量的边缘或第二数量的边缘来生成脉冲。 在某些情况下，第二数量的边可以是第一数量的边加上一个边。 第一和第二数量的边缘可以是可编程的数量。

公开(公告)号：US20140203884A1

公开(公告)日：2014-07-24

申请号：US13746247

申请日：2013-01-21

Applicant: APPLE INC.

Inventor： Kleanthes G. Koniaris ,  Erik P. Machnicki ,  Shane J. Keil

IPC: H03L7/099 ,  H03K3/64

CPC classification number: H03K3/64

Abstract: Various techniques for generating an output clock based on a reference clock. This disclosure relates to generating an output clock signal based on a reference clock signal. In one embodiment, a method includes generating, using information received from a control circuit, an output clock signal using both a first number of edges or an input clock signal and a second, different number of edges of the input clock signal. In this embodiment, the control circuit runs at a frequency that is less than a frequency of the input clock signal. The received information may indicate, for a pulse of the output clock signal, whether the pulse should be generated using the first number of edges or the second number of edges. In some cases, the second number of edges may be the first number of edges plus one. The first and second number of edges may be programmable quantities.

Abstract translation: 用于基于参考时钟产生输出时钟的各种技术。 本公开涉及基于参考时钟信号产生输出时钟信号。 在一个实施例中，一种方法包括：使用从控制电路接收的信息，使用输入时钟信号的第一数量的边缘或输入时钟信号和第二不同数量的边缘来产生输出时钟信号。 在本实施例中，控制电路的运行频率小于输入时钟信号的频率。 接收到的信息可以针对输出时钟信号的脉冲来指示是否应该使用第一数量的边缘或第二数量的边缘来生成脉冲。 在某些情况下，第二数量的边可以是第一数量的边加上一个边。 第一和第二数量的边缘可以是可编程的数量。