公开(公告)号：US09438225B1

公开(公告)日：2016-09-06

申请号：US14736882

申请日：2015-06-11

Applicant: APPLIED MICRO CIRCUITS CORPORATION

Inventor： Alfred Yeung ,  Ronen Cohan

IPC: H03K17/16

CPC classification number: H01L27/0248

Abstract: A decoupling capacitor circuit design facilitates high operational frequency without sacrificing area efficiency. In order to disassociate the sometimes opposing design criteria of high operational frequency and area efficiency, a p-channel field effect transistor (PFET) and an n-channel field effect transistor are connected in a half-cross-coupled (HCC) fashion. The HCC circuit is then supplemented by at least one area efficient capacitance (AEC) device. The half-cross-coupled transistors address the high frequency design requirement, while the AEC device(s) address the high area efficiency requirement. The design eliminates the undesirable trade-off between operating frequency and area efficiency inherent in some conventional DCAP designs.

Abstract translation: 去耦电容电路设计有助于高工作频率，而不牺牲面积效率。 为了解决高操作频率和面积效率的有时相反的设计标准，p沟道场效应晶体管（PFET）和n沟道场效应晶体管以半交叉耦合（HCC）方式连接。 然后，HCC电路由至少一个区域有效电容（AEC）装置补充。 半交叉耦合晶体管满足高频设计要求，而AEC器件满足高区域效率要求。 该设计消除了一些常规DCAP设计中固有的工作频率和面积效率之间的不利权衡。