公开(公告)号：US20240385530A1

公开(公告)日：2024-11-21

申请号：US18565494

申请日：2022-05-29

Applicant: ASML NETHERLANDS B.V.

Inventor： Jiao HUANG ,  Jinze Wang ,  Yan YAN ,  Yongfa FAN ,  Liang Liu ,  Mu FENG

IPC: G03F7/00

Abstract: Etch bias is determined based on a curvature of a contour in a substrate pattern. The etch bias is configured to be used to enhance an accuracy of a semiconductor patterning process relative to prior patterning processes. In some embodiments, a representation of the substrate pattern is received, which includes the contour in the substrate pattern. The curvature of the contour of the substrate pattern is determined and inputted to a simulation model. The simulation model includes a correlation between etch biases and curvatures of contours. The etch bias for the contour in the substrate pattern is outputted by the simulation model based on the curvature.