-
公开(公告)号:US11705462B2
公开(公告)日:2023-07-18
申请号:US16995806
申请日:2020-08-17
Applicant: Au Optronics Corporation
Inventor: Ya-Ling Hsu , Min-Tse Lee , Ti-Kuei Yu , Yueh-Chi Wu , Shu-Wen Liao , Hung-Chia Liao , Yueh-Hung Chung , Jia-Hong Wang , Ping-Wen Chen , Sheng-Yen Cheng , Chen-Hsien Liao
IPC: H01L27/12
CPC classification number: H01L27/124
Abstract: An electronic device includes a substrate, multiple transversal signal lines, a first vertical signal line, a second vertical signal line, a shielding wire, and multiple pixel structures. The first vertical signal line is intersected with the transversal signal lines. The second vertical signal line is intersected with the transversal signal lines and connected to one of the transversal signal lines. An orthogonal projection of the shielding wire on the substrate is located between an orthogonal projection of the first vertical signal line and an orthogonal projection of the second vertical signal line on the substrate. One of the pixel structures is surrounded by a corresponding one of the transversal signal lines and the second vertical signal line and includes an active device. A gate and a source of the active device is electrically connected to the corresponding one transversal signal line and the first vertical signal line respectively.
-
公开(公告)号:US11362168B2
公开(公告)日:2022-06-14
申请号:US16995785
申请日:2020-08-17
Applicant: Au Optronics Corporation
Inventor: Jia-Hong Wang , Min-Tse Lee , Sheng-Yen Cheng , Yueh-Hung Chung , Han-Ming Chen , Ping-Wen Chen , Hung-Chia Liao , Ya-Ling Hsu , Chen-Hsien Liao
IPC: H01L27/32 , G02F1/1362
Abstract: A display panel including sub pixels, a plurality of first and second scan lines, a plurality of first and second data lines, a plurality of first and second auxiliary lines and first conductive vias is provided. The sub pixels are arranged into first rows arranged in a first direction and second rows arranged in a second direction. The second rows are electrically connected to the first and second scan lines in alternation and are electrically connected to the first and second data lines in alternation. Each first auxiliary line includes a first portion electrically connected to a corresponding first scan line and a second portion spaced away from the first portion. The second auxiliary lines are respectively located between two adjacent first rows. Each second scan line is electrically connected to a corresponding first scan line through at least one second auxiliary line.
-
公开(公告)号:US20220068182A1
公开(公告)日:2022-03-03
申请号:US17521790
申请日:2021-11-08
Applicant: Au Optronics Corporation
Inventor: Yang-Chun Lee , Sheng-Yen Cheng , Yueh-Hung Chung , Min-Tse Lee , Kuang-Hsiang Liao , Shiang-Lin Lian , Yan-Kai Wang , Ya-Ling Hsu , Chen-Hsien Liao
IPC: G09G3/20
Abstract: A pixel array substrate, including scanning line pads, data line pads, scanning lines, data lines, gate transmission lines, pixels, a data line signal chip, and a scanning line signal chip, is provided. The scanning lines extend along a first direction. The data lines and the gate transmission lines extend along a second direction. The data lines are electrically connected to the data line pads. The scanning lines are electrically connected to the scanning line pads through the gate transmission lines. A ratio of a number of rows of pixels arranged in the first direction to a number of rows of pixels arranged in the second direction is X:Y. Each pixel includes m sub-pixels.
-
公开(公告)号:US20220013592A1
公开(公告)日:2022-01-13
申请号:US17226100
申请日:2021-04-09
Applicant: Au Optronics Corporation
Inventor: Bo-Chen Chen , Yun-Ru Cheng , Ya-Ling Hsu , Chia-Hsuan Pai , Cheng-Wei Huang , Wei-Shan Chao
Abstract: A display panel includes a first substrate, pixel structures, a first common pad, a second substrate, a second common electrode, a display medium and a conductive particle. The pixel structures are disposed on an active area of the first substrate. The first common pad is disposed on a peripheral area of the first substrate, and is electrically connected to first common electrodes of the pixel structures. The second common electrode is disposed on the second substrate. The conductive particle is disposed on the first common pad, and is electrically connected to the first common pad and the second common electrode. The conductive particle includes a core and a conductive film disposed on a surface of the core, where the conductive film has a main portion and raised portions, and a film thickness of each of the raised portions is greater than a film thickness of the main portion.
-
公开(公告)号:US11194204B2
公开(公告)日:2021-12-07
申请号:US16843901
申请日:2020-04-09
Applicant: Au Optronics Corporation
Inventor: Hung-Che Lin , Min-Tse Lee , Yi-Ren Chen , Yueh-Hung Chung , Sheng-Ju Ho , Yan-Kai Wang , Ya-Ling Hsu , Chien-Huang Liao , Chen-Hsien Liao
IPC: G02F1/1362 , G02F1/1333 , G02F1/1368 , H01L27/12
Abstract: A pixel array substrate including a substrate, pixel structures, and transfer lines is provided. The pixel structures are disposed on the substrate. Each pixel structure includes a data line, a gate line, an active device, and a pixel electrode. The active device is electrically connected to the data line and the gate line. The pixel electrode is electrically connected to the active device. The pixel electrode defines alignment domains. The alignment domains have different alignment directions. The transfer lines are arranged in a first direction. Gate lines of the pixel structures are arranged in a second direction. The first direction and the second direction are interlaced. The transfer lines are electrically connected to the gate lines. The pixel structures include a first pixel structure. The transfer lines include a first transfer line. The first transfer line overlaps a boundary between the alignment domains of the first pixel structure.
-
公开(公告)号:US10985193B2
公开(公告)日:2021-04-20
申请号:US16672514
申请日:2019-11-03
Applicant: Au Optronics Corporation
Inventor: Sheng-Yen Cheng , Min-Tse Lee , Yueh-Hung Chung , Ya-Ling Hsu
IPC: H01L29/786 , H01L27/12 , G02F1/1362 , G02F1/1368 , H01L49/02
Abstract: A display panel includes pixels and a first conductive element. Each pixel includes a first signal line, a second signal line, a third signal line, a first switch, a second switch, a third switch, a first pixel electrode, a second pixel electrode, a first capacitor, a second capacitor, a third capacitor, and an insulating layer. The first signal lines are arranged in a first direction. Orthogonal projections of a first electrode of a second capacitor of a first pixel, a first electrode of a third capacitor of the first pixel, and a first contact window of an insulating layer of the first pixel on a first substrate are arranged in the first direction. The first conductive element is electrically connected to a second electrode of the third capacitor of the first pixel and a second electrode of the second capacitor of the first pixel through the first contact window.
-
公开(公告)号:US20210041753A1
公开(公告)日:2021-02-11
申请号:US17083300
申请日:2020-10-29
Applicant: Au Optronics Corporation
Inventor: Min-Tse Lee , Sheng-Yen Cheng , Yueh-Hung Chung , Kuang-Hsiang Liao , Yang-Chun Lee , Yan-Kai Wang , Ya-Ling Hsu , Yi-Ren Chen , Hung-Che Lin , Sheng-Ju Ho , Chien-Huang Liao , Chen-Hsien Liao
IPC: G02F1/1362
Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
-
公开(公告)号:US10852609B2
公开(公告)日:2020-12-01
申请号:US16792904
申请日:2020-02-18
Applicant: Au Optronics Corporation
Inventor: Min-Tse Lee , Sheng-Yen Cheng , Yueh-Hung Chung , Kuang-Hsiang Liao , Yang-Chun Lee , Yan-Kai Wang , Ya-Ling Hsu , Yi-Ren Chen , Hung-Che Lin , Sheng-Ju Ho , Chien-Huang Liao , Chen-Hsien Liao
IPC: G02F1/1362
Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
-
公开(公告)号:US20200272010A1
公开(公告)日:2020-08-27
申请号:US16792904
申请日:2020-02-18
Applicant: Au Optronics Corporation
Inventor: Min-Tse Lee , Sheng-Yen Cheng , Yueh-Hung Chung , Kuang-Hsiang Liao , Yang-Chun Lee , Yan-Kai Wang , Ya-Ling Hsu , Yi-Ren Chen , Hung-Che Lin , Sheng-Ju Ho , Chien-Huang Liao , Chen-Hsien Liao
IPC: G02F1/1362
Abstract: A pixel array substrate including a substrate, data lines, gate lines, pixels, and transfer lines is provided. The data lines are disposed on the substrate and arranged in a first direction. The gate lines are disposed on the substrate and arranged in a second direction interlaced with the first direction. The pixels are disposed on the substrate, each of which includes an active device electrically connected to one of the data lines and one of the gate lines and a pixel electrode electrically connected to the active device. The transfer lines are arranged in the first direction and electrically connected to the gate lines, respectively. The pixels include first pixels. In a top view of the pixel array substrate, at least one of the pixel electrodes of the first pixels is partially overlapped with one of the transfer lines. A driving method of a pixel array substrate is also provided.
-
公开(公告)号:US10755661B2
公开(公告)日:2020-08-25
申请号:US16431738
申请日:2019-06-05
Applicant: Au Optronics Corporation
Inventor: Yueh-Hung Chung , Ya-Ling Hsu , Han-Ming Chen , Chen-Hsien Liao
Abstract: A display panel has a display area and a non-display area surrounding the display area, and the display panel includes scan lines, data lines, pixel structures, at least one driving device, capacitor electrode lines, and compensation capacitors. Each pixel structure includes an active device, a pixel electrode, and a storage capacitor. The driving device is located in the non-display area and is electrically connected to the pixel structures. The capacitor electrode lines extend to the display area from the non-display area and are electrically connected to the storage capacitors of the pixel structures. The compensation capacitors are located in the non-display area and between the pixel structures and the driving device. Two ends of each of the compensation capacitor are electrically connected to one of the scan lines and one of the capacitor electrode lines, respectively.
-
-
-
-
-
-
-
-
-