公开(公告)号：US11114007B2

公开(公告)日：2021-09-07

申请号：US16808444

申请日：2020-03-04

Applicant: AU Optronics Corporation

Inventor： Chun-Wei Chang ,  Jie-Chuan Huang

IPC: G09G3/34 ,  G09G3/20

Abstract: A display panel includes multiple data lines, a scan lines, pixel circuit and a driving circuit. The data lines are configured to receive multiple data signals in a display period. There is a buffer period before the display period. The scan line is configured to receive a scan signal during the display period. The pixel circuit is electrically connected to the data lines and the scan line for receiving the data signals and the scan signal. The driving circuit is electrically connected to the data line, and configured to receive multiple charging signals during the buffer period. The charging signals are corresponding to the data lines and gradually increase so that the driving circuit charges the data lines according to the charging signals.

公开(公告)号：US11138945B2

公开(公告)日：2021-10-05

申请号：US16879306

申请日：2020-05-20

Applicant: AU Optronics Corporation

Inventor： Jie-Chuan Huang ,  Chun-Wei Chang ,  Chia-Ming Wu

IPC: G09G3/36

Abstract: The present disclosure provides a source driver module for driving a display panel. The source drive module includes a source driver circuit, a first conductive wire and a first switch unit. The first conductive wire is electrically connected to the source driver circuit. The first switch unit is connected between the first conductive wire and a first data line of the display panel to conduct current therebetween during a first data outputting period and a second data outputting period, and to interrupt current therebetween during a first switch-off period connecting the first data outputting period and the second data outputting period. The source driver circuit outputs a first voltage signal during the first data outputting period and the first switch-off period; it outputs a second voltage signal during the second data outputting period; and it outputs the first voltage signal during the first switch-off period.

公开(公告)号：US10782814B2

公开(公告)日：2020-09-22

申请号：US16297735

申请日：2019-03-11

Applicant: Au Optronics Corporation

Inventor： Rong-Fu Lin ,  Chun-Wei Chang ,  Shu-Hao Huang ,  Sung-Yu Su ,  Jie-Chuan Huang ,  Yun-I Liu

IPC: G06F3/041 ,  G09G3/20

Abstract: A touch display panel includes a pixel array, a touch module, and a multiplexer circuit. The pixel array includes a plurality of pixels, a plurality of gate lines, and a plurality of source lines. The pixels are electrically coupled to the source lines and the gate lines. The touch module and the pixel array are overlapped. The multiplexer circuit is coupled between all of the source lines and a source driver and has a plurality of multiplexers. The multiplexers are respectively coupled to n source lines and respectively include a plurality of switches and a bypass trace. The switches are respectively coupled between the first source line to the (n−1)th source line of the n source lines and the source drivers. The bypass trace is coupled between the nth source line of the n source lines and the source driver.

公开(公告)号：US20190286268A1

公开(公告)日：2019-09-19

申请号：US16297735

申请日：2019-03-11

Applicant: Au Optronics Corporation

Inventor： Rong-Fu Lin ,  Chun-Wei Chang ,  Shu-Hao Huang ,  Sung-Yu Su ,  Jie-Chuan Huang ,  Yun-I Liu

IPC: G06F3/041 ,  G09G3/20

Abstract: A touch display panel includes a pixel array, a touch module, and a multiplexer circuit. The pixel array includes a plurality of pixels, a plurality of gate lines, and a plurality of source lines. The pixels are electrically coupled to the source lines and the gate lines. The touch module and the pixel array are overlapped. The multiplexer circuit is coupled between all of the source lines and a source driver and has a plurality of multiplexers. The multiplexers are respectively coupled to n source lines and respectively include a plurality of switches and a bypass trace. The switches are respectively coupled between the first source line to the (n−1)th source line of the n source lines and the source drivers. The bypass trace is coupled between the nth source line of the n source lines and the source driver.