公开(公告)号：US10998069B2

公开(公告)日：2021-05-04

申请号：US16790811

申请日：2020-02-14

Applicant: AU Optronics Corporation

Inventor： Ling-Ying Chien ,  Kuang-Hsiang Liu ,  Chee-Wai Lau

IPC: G11C19/28 ,  G09G3/3225

Abstract: An electronic device includes an active area and multiple shift registers. The active area comprises multiple pixel circuits. Each of the multiple shift registers is configured to output a first control signal, a second control signal, and a third control signal to a part of pixel circuits of the multiple pixel circuits. A duty ratio of the third control signal is greater than a duty ratio of the second control signal, and the duty ratio of the second control signal is greater than a duty ratio of the first control signal. A part of the multiple shift registers and other part of the multiple shift registers are substantially symmetrically disposed at two sides of the active area, respectively.

公开(公告)号：US09449711B2

公开(公告)日：2016-09-20

申请号：US14024777

申请日：2013-09-12

Applicant: AU Optronics Corporation

Inventor： Ling-Ying Chien ,  Kuang-Hsiang Liu ,  Yu-Hsin Ting

IPC: G11C19/00 ,  G11C19/28 ,  G09G3/36

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G2310/0286

Abstract: A shift register circuit and a shading waveform generating method are disclosed. The shift register circuit includes plural stages of shift registers. Each stage of the shift register includes an output transistor, an input unit and a gate-shading circuit. The output transistor is configured for generating an output signal of the stage of the shift register. The input unit is configured for controlling a voltage level on a gate terminal of the output transistor. The gate-shading circuit includes a first switch, a second switch and a third switch. The first switch is configured for outputting a control signal. The second switch is configured for pulling down the voltage level on the gate terminal of the output transistor according to the control signal. The third switch is configured for pulling down a level on an output terminal of the output transistor according to the control signal.

Abstract translation: 公开了移位寄存器电路和阴影波形生成方法。 移位寄存器电路包括多级移位寄存器。 移位寄存器的每个级包括输出晶体管，输入单元和栅极阴影电路。 输出晶体管被配置为产生移位寄存器的级的输出信号。 输入单元被配置为用于控制输出晶体管的栅极端子上的电压电平。 栅极遮蔽电路包括第一开关，第二开关和第三开关。 第一开关被配置为输出控制信号。 第二开关被配置为根据控制信号来降低输出晶体管的栅极端子上的电压电平。 第三开关被配置为根据控制信号来拉低输出晶体管的输出端子上的电平。