摘要:
A sample voltage is received from a device at a first slicer element and a second slicer element. A decision by the first slicer element based on the sample voltage is identified and compared with a decision of the second slicer element based on the sample voltage. The decision of the second slicer element is to be generated from a comparison of the sample voltage with a reference voltage for the second slicer element. Comparing the decisions can be the basis of a soft error ration determined for a device.
摘要:
Jitter reduction of electrical signals from limiting optical modules is described. In one example, a process includes receiving an amplitude limited electrical signal that has been converted from an optical signal, applying a filter to the received electrical signal, measuring an indication of jitter of the filtered signal, and selecting parameters of the linear filter based on the measured indication.
摘要:
In one embodiment of the present invention, a method includes establishing a communication link between a first link partner and a second link partner, causing the first link partner to transmit idle signals, and analyzing a desired channel of the communication link using the idle signals. As an example, the communication link may be an Ethernet link and the link may be maintained during the channel analysis so that system data transmissions may be resumed or initiated immediately after the analysis is completed.
摘要:
Techniques are described herein that can be used to decode signals received over multiple channels. The received signals may be processed using noise reducing logic. Signal-to-noise ratio information per channel for signals received over each of the multiple channels may be considered to determine reliability information concerning the slicer input for each channel. Low density parity check codes or other forward error correction (FEC) codes may be used to decode the processed signals from all the multiple channels,based on the reliability information.
摘要:
Techniques are described to reduce delayed reflection inter-symbol interference (ISI) in signals. In some implementations, a channel reflection canceller is provided at a signal receiver to reduce delayed reflection ISI in received signals. The channel reflection canceller may be provided with a signal from an equalizer output or a tentative or final decision from a forward-error correction (FEC) decoder. Based on the signal from the equalizer output or tentative or final decisions from the FEC decoder, the channel reflection canceller may generate a signal to reduce delayed reflection ISI in received signals. In addition or as an alternative, in some implementations, the remote transmitter of the signal generates a delayed reflection ISI reducing signal to reduce delayed reflection ISI present in the signal transmitted over a channel. The transmitter may generate the delayed reflection ISI reducing signal using information provided by the remote signal receiver.
摘要:
Techniques are described to adaptively adjust the equalizer settings of each transmitter in a transmitter-receiver pair. The transmitter-receiver pair can be used at least with implementations that comply with 40GBASE-CR4 or 100GBASE-CR10. For implementations that comply with 40GBASE-CR4, equalizer settings of four transmitters may be independently established.
摘要:
Techniques are described to adaptively adjust the equalizer settings of each transmitter in a transmitter-receiver pair. The transmitter-receiver pair can be used at least with implementations that comply with 40GBASE-CR4 or 100GBASE-CR10. For implementations that comply with 40GBASE-CR4, equalizer settings of four transmitters may be independently established.
摘要:
In one embodiment, the present invention includes an apparatus having a digital signal processor (DSP) coupled to receive a digitized signal. The DSP may be controlled to perform a timing recovery mechanism that implements a Mueller and Müller (MM)-based algorithm to generate a sensor output responsive to the digitized signal, where the incoming signal is non-linearly precoded in a transmitter from which the signal is received. Other embodiments are described and claimed.
摘要:
Techniques to perform adaptive interference cancellation are described. A first apparatus may include a timing recovery module to produce a timing recovery command signal, an interference canceller to receive an interference reference signal and produce an interference canceller signal, and an interpolator to couple to the timing recovery module and the interference canceller, the interpolator to receive the timing recovery command signal and the interference canceller signal and produce an interpolated interference canceller signal. A second apparatus may include a time-domain interference canceller to receive an interference reference signal and produce a time-domain interference canceller signal and a frequency-domain interference canceller to receive the interference reference signal and produce a frequency-domain interference canceller signal. Other embodiments are described and claimed.
摘要:
In one embodiment, the present invention includes an apparatus having a digital signal processor (DSP) coupled to receive a digitized signal. The DSP may be controlled to perform a timing recovery mechanism that implements a Mueller and Müller (MM)-based algorithm to generate a sensor output responsive to the digitized signal, where the incoming signal is non-linearly precoded in a transmitter from which the signal is received. Other embodiments are described and claimed.