-
公开(公告)号:US11706046B2
公开(公告)日:2023-07-18
申请号:US17711378
申请日:2022-04-01
Applicant: Ademco Inc.
Inventor: Nagaraj Chickmagalur Lakshminarayan , Arun Handanakere Sheshagiri , Rajeev Ranjan , Sheetal R. Kadam , Robert D. Juntunen
IPC: H04L12/28 , H04W4/80 , H04B7/26 , H04W72/0446
CPC classification number: H04L12/2832 , H04B7/2656 , H04W4/80 , H04W72/0446 , H04L2012/2841
Abstract: An apparatus includes processing circuitry configured to output, to a plurality of devices, an initial superframe configured in an initial superframe mode of a plurality of superframe modes. Each superframe mode of the plurality of superframe modes allocating each slot of a plurality of slots for wireless communication to a first protocol, a second protocol, or a third protocol. In response to determining a change in bandwidth, the processing circuitry is configured to select an updated superframe mode from the plurality of superframe modes. The processing circuitry is further configured to output, to the plurality of devices, an updated superframe configured in the updated superframe mode.
-
公开(公告)号:US20210250197A1
公开(公告)日:2021-08-12
申请号:US16785047
申请日:2020-02-07
Applicant: Ademco Inc.
Inventor: Nagaraj Chickmagalur Lakshminarayan , Arun Handanakere Sheshagiri , Rajeev Ranjan , Sheetal R. Kadam
Abstract: An apparatus includes processing circuitry configured to output, to a plurality of devices, an initial superframe configured in an initial superframe mode of a plurality of superframe modes. Each superframe mode of the plurality of superframe modes allocating each slot of a plurality of slots for wireless communication to a first protocol, a second protocol, or a third protocol. In response to determining a change in bandwidth, the processing circuitry is configured to select an updated superframe mode from the plurality of superframe modes. The processing circuitry is further configured to output, to the plurality of devices, an updated superframe configured in the updated superframe mode.
-
公开(公告)号:US20220224560A1
公开(公告)日:2022-07-14
申请号:US17711378
申请日:2022-04-01
Applicant: Ademco Inc.
Inventor: Nagaraj Chickmagalur Lakshminarayan , Arun Handanakere Sheshagiri , Rajeev Ranjan , Sheetal R. Kadam
Abstract: An apparatus includes processing circuitry configured to output, to a plurality of devices, an initial superframe configured in an initial superframe mode of a plurality of superframe modes. Each superframe mode of the plurality of superframe modes allocating each slot of a plurality of slots for wireless communication to a first protocol, a second protocol, or a third protocol. In response to determining a change in bandwidth, the processing circuitry is configured to select an updated superframe mode from the plurality of superframe modes. The processing circuitry is further configured to output, to the plurality of devices, an updated superframe configured in the updated superframe mode.
-
公开(公告)号:US11329842B2
公开(公告)日:2022-05-10
申请号:US16785047
申请日:2020-02-07
Applicant: Ademco Inc.
Inventor: Nagaraj Chickmagalur Lakshminarayan , Arun Handanakere Sheshagiri , Rajeev Ranjan , Sheetal R. Kadam
Abstract: An apparatus includes processing circuitry configured to output, to a plurality of devices, an initial superframe configured in an initial superframe mode of a plurality of superframe modes. Each superframe mode of the plurality of superframe modes allocating each slot of a plurality of slots for wireless communication to a first protocol, a second protocol, or a third protocol. In response to determining a change in bandwidth, the processing circuitry is configured to select an updated superframe mode from the plurality of superframe modes. The processing circuitry is further configured to output, to the plurality of devices, an updated superframe configured in the updated superframe mode.
-
-
-