公开(公告)号：US10236240B2

公开(公告)日：2019-03-19

申请号：US15152316

申请日：2016-05-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yuan-Hsi Chou ,  Tsun-Lung Hsieh ,  Chen-Chao Wang

IPC: H01L23/00 ,  H01L23/498

Abstract: In one or more embodiments, a substrate includes a patterned conductive layer and a reference layer. The patterned conductive layer includes a pair of first conductive traces, a pair of second conductive traces and a reference trace between the pair of first conductive traces and the pair of second conductive traces. The reference layer is above the patterned conductive layer and defines an opening.

公开(公告)号：US10903152B2

公开(公告)日：2021-01-26

申请号：US16357159

申请日：2019-03-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yuan-Hsi Chou ,  Tsun-Lung Hsieh ,  Chen-Chao Wang

IPC: H01L23/498 ,  H01L23/00

Abstract: A substrate includes: (1) a first patterned conductive layer, the first patterned conductive layer including a pair of first transmission lines adjacent to each other; and (2) a first reference layer above the pair of first transmission lines, the first reference layer defining an opening, wherein the pair of first transmission lines are exposed to the opening.