Abstract:
The invention relates to a method for ascertaining a resistance value (Z) between a first contact (2) and a second contact (3) in a subscriber line interface circuit (4), where a protective circuit (9) for protecting the subscriber line interface circuit (4) against overvoltages is provided between the two contacts (2, 3) and comprises a parallel circuit containing a protective capacitor (5) with two resistors (7, 8) connected in series via a node (K), the node (K) being connected to a third contact (10) in the subscriber line interface circuit (4), where the method has the following steps: a predetermined charging voltage (UCharge) is applied to the protective capacitor (5); a threshold voltage (UTH) is calculated on the basis of the resistance values (R1, R2) of the two resistors (7, 8) and the applied charging voltage (UCharge); a measured voltage (UM) tapped off across one of the two resistors (7, 8) is measured while the protective capacitor (5) is discharging; the measured voltage (UM) is compared with the calculated threshold voltage (UTH); a period (Δt) between the start of the discharging of the protective capacitor (5) and the time at which the measured voltage (UM) is the same as the threshold voltage (UTH) is ascertained; and the resistance value (Z) is calculated using the ascertained period (Δt) and the resistance values (R1, R2) of the two resistors (7, 8).
Abstract:
The invention relates to a method and an apparatus for controlling a digital signal processor having a number of arithmetic units (1a, 1b) which process a program (8). A control unit (5) is provided for independent control of the individual arithmetic units (1a, 1b), which control unit (5) reads and evaluates the flags (9a, 9b) which are specific to the arithmetic units, and deactivates those arithmetic units (1a, 1b) whose associated flag is not set, so that a subroutine is carried out only by those arithmetic units (1a, 1b) whose flags are set.
Abstract:
A method and a device for interpolating or decimating a signal is provided, the signal being processed by a plurality of signal processing means connected in series, which at least comprise means for increasing or reducing a clock rate of the signal and filtering means. To achieve adaptation to different operating modes or transmission standards, individual portions of the signal processing means connected in series can be bridged by bypasses. In addition, filtering parameters of the filtering means can be varied and factors, by which a clock rate of the signal is increased or reduced, can be changed.
Abstract:
A grounding key detecting device and method for interference-proof detection of the operation of grounding keys in telephones. A circuit that detects the operation of a grounding key includes a current detection device configured to detect a current flowing when the grounding key is in operation, a comparator configured to compare the detected current with at least one threshold value, and a monitoring circuit configured to detect a first period when the current exceeds the threshold value, detect a second period when the current drops below the threshold value, and output a grounding key detection signal when the first period is greater than the second period.