公开(公告)号：US06281557B1

公开(公告)日：2001-08-28

申请号：US09126173

申请日：1998-07-30

申请人： Alexander Trueby ,  Ulrich Zimmermann ,  Armin Kohlhase

发明人： Alexander Trueby ,  Ulrich Zimmermann ,  Armin Kohlhase

IPC分类号： H01L2976

CPC分类号： H01L27/11273 ,  H01L21/76224 ,  H01L27/112

摘要： A read-only memory cell array has vertical MOS transistors formed on trench walls, and is programmed with a programming mask which covers only the areas at which a transistor is not to be produced. As a result, the word lines can be formed with minimum grid spacing and the risk of short-circuiting between adjacent word lines is eliminated by buried ploy stringers.

摘要翻译： 只读存储单元阵列具有形成在沟槽壁上的垂直MOS晶体管，并且用仅覆盖晶体管不被产生的区域的编程掩模进行编程。 结果，字线可以以最小的网格间隔形成，并且相邻字线之间的短路的风险通过埋入的桁架桁架消除。

公开(公告)号：US06924209B2

公开(公告)日：2005-08-02

申请号：US10416674

申请日：2001-10-17

申请人： Hans-Peter Moll ,  Alexander Trueby ,  Andreas Wich-Glasen

发明人： Hans-Peter Moll ,  Alexander Trueby ,  Andreas Wich-Glasen

IPC分类号： H01L21/762 ,  H01L21/76

CPC分类号： H01L21/76224 ,  Y10S438/928 ,  Y10S438/976

摘要： A method for the fabrication of an integrated semiconductor component, in which at least one isolation trench is formed, a first layer of a nonconductive material is applied by a nonconformal deposition method, and a second layer of a nonconductive material is applied by a conformal deposition method at least to the back surface of the semiconductor component.

摘要翻译： 一种用于制造其中形成至少一个隔离沟槽的集成半导体部件的方法，通过非共形沉积方法施加非导电材料的第一层，并且通过保形沉积法施加第二非导电材料层 方法至少至半导体部件的背面。