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公开(公告)号:US20240118835A1
公开(公告)日:2024-04-11
申请号:US18309825
申请日:2023-04-30
发明人: Fei XUE , Wentao WU , Jiajing JIN , Xiang GAO , Jifeng WANG , Yuming XU , Jiu HENG , Hongzhong ZHENG
IPC分类号: G06F3/06
CPC分类号: G06F3/0659 , G06F3/0652 , G06F3/0679 , G06F3/0607
摘要: An SSD includes an MRAM, an NAND memory, and an SSD controller. The SSD controller is configured to receive first data from a host machine, save the first data to an SSD data buffer, fetch the first data from the SSD data buffer and write the first data to the MRAM via the MRAM controller, determine, by the data allocation circuit based on a characteristic of the first data, whether to save the first data to the MRAM or the NAND memory, and in response to determining saving the first data to the NAND memory, read the first data from the MRAM, write the first data to the NAND memory, and erase the first data from the MRAM.