专利检索 ap:("Altug Koker" OR "Prassonkumar Surti" OR "Guei-Yuan Lueh" OR "Subramaniam Maiyuran" OR "Tomas G. Akenine-Moller" OR "David J. Cowperthwaite" OR "Balaji Vembu") AND inv:"Prassonkumar Surti" 第 1 页

1.

发明申请
Thread Priority Mechanism 审中-公开

公开(公告)号：US20180095785A1

公开(公告)日：2018-04-05

申请号：US15281260

申请日：2016-09-30

申请人： Altug Koker , Prassonkumar Surti , Guei-Yuan Lueh , Subramaniam Maiyuran , Tomas G. Akenine-Moller , David J. Cowperthwaite , Balaji Vembu

发明人： Altug Koker , Prassonkumar Surti , Guei-Yuan Lueh , Subramaniam Maiyuran , Tomas G. Akenine-Moller , David J. Cowperthwaite , Balaji Vembu

IPC分类号： G06F9/48

CPC分类号： G06F9/4831 , G06F9/4881

摘要： A processing apparatus is described. The apparatus includes a graphics processing unit (GPU), including a thread dispatcher to assign a priority class to each of a plurality of processing threads prior to dispatching the one or more processing threads, a plurality of execution units to process the threads, a shared resource coupled to each of the plurality of execution units and an arbitration unit to grant access to the shared resource to a first of the plurality of execution units based on the priority class of a thread being executed at the first execution unit.