公开(公告)号：US12169786B1

公开(公告)日：2024-12-17

申请号：US16455334

申请日：2019-06-27

Applicant: Amazon Technologies, Inc.

Inventor： Tariq Afzal ,  Arvind Mandhani ,  Shiva Navab

IPC: G06N3/10 ,  G06N3/02 ,  G06N3/08

Abstract: Described herein is a neural network accelerator (NNA) with reconfigurable memory resources for forming a set of local memory buffers comprising at least one activation buffer, at least one weight buffer, and at least one output buffer. The NNA supports a plurality of predefined memory configurations that are optimized for maximizing throughput and reducing overall power consumption in different types of neural networks. The memory configurations differ with respect to at least one of a total amount of activation, weight, or output buffer memory, or a total number of activation, weight, or output buffers. Depending on which type of neural network is being executed and the memory behavior of the specific neural network, a memory configuration can be selected accordingly.