公开(公告)号：US20220368339A1

公开(公告)日：2022-11-17

申请号：US17877991

申请日：2022-07-31

申请人： Analog Devices, Inc.

发明人： Jesper STEENSGAARD-MADSEN

IPC分类号： H03M1/12 ,  H03F1/42 ,  H03F3/00

摘要： Herein disclosed are multiple embodiments of a signal-processing circuit that may be utilized in various circuits, including conversion circuitry. The signal-processing circuit may receive an input and produce charges on multiple different capacitors during different phases of operation based on the input. The charges stored on two or more of the multiple different capacitors may be utilized for producing an output of the signal-processing circuit, such as by combing the charges stored on two or more of the multiple different capacitors. Utilizing the charges on the multiple different capacitors may provide for a high level of accuracy and robustness to variations of environmental factors, and/or a low noise level and power consumption when producing the output.

公开(公告)号：US20230117529A1

公开(公告)日：2023-04-20

申请号：US18066053

申请日：2022-12-14

申请人： Analog Devices, Inc.

发明人： Jesper STEENSGAARD-MADSEN

IPC分类号： H03M1/46 ,  H03M1/12

摘要： Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.

公开(公告)号：US20220069836A1

公开(公告)日：2022-03-03

申请号：US17521488

申请日：2021-11-08

申请人： Analog Devices, Inc.

发明人： Jesper STEENSGAARD-MADSEN

IPC分类号： H03M1/46 ,  H03M1/12

摘要： Herein disclosed is an example analog-to-digital converter (ADC) and methods that may be performed by the ADC. The ADC may derive a first code that approximates a combination of an analog input value of the ADC and a dither value for the ADC sampled on a capacitor array. The ADC may further derive a second code to represent a residue of the combination with respect to the first code applied to the capacitor array. The ADC may combine the numerical value of the first code and the numerical value of the second code to produce a combined code applied to the capacitor array for deriving a digital output code. Combining the numerical value of the first code and the numerical value of the second code in the digital domain can provide for greater analog-to-digital (A/D) conversion linearity.

公开(公告)号：US20220077868A1

公开(公告)日：2022-03-10

申请号：US17524542

申请日：2021-11-11

申请人： Analog Devices, Inc.

发明人： Jesper STEENSGAARD-MADSEN ,  Andrew J. THOMAS

IPC分类号： H03M1/10 ,  H03M1/42 ,  H03M1/44

摘要： Disclosed herein are some examples of analog-to-digital converters (ADCs) that can perform auto-zeroing with amplifying a signal for improvement of a signal-to-noise ratio. The ADCs may produce a first digital code to represent an analog input signal and a second digital code based on a residue from the first digital code, and may combine the first digital code and the second digital code to produce a digital output code to represent the analog input signal. The ADC may utilize a first observation and a second observation of an analog residue value representing the residue to produce the second digital code.