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公开(公告)号：US10541604B2
公开(公告)日：2020-01-21
申请号：US15986346
申请日：2018-05-22
Applicant: Analog Devices Global Unlimited Company
Inventor： Christopher Peter Hurrell , Derek J. Hummerston
Abstract: Techniques for supplying a bias current to a load are provided. In certain examples, a circuit can include a level-shift capacitance, a current source, and a load configured to receive a bias current in a first state of the circuit. The current source and the level-shift capacitance can be coupled in series between the load and a supply voltage in the first state. In some examples, during a second state of the circuit, the level-shift capacitance can receive charge, and can be isolated from one of the load or the current source.
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Patent Agency Ranking
公开(公告)号：US10333543B1
公开(公告)日：2019-06-25
申请号：US15975885
申请日：2018-05-10
Applicant: Analog Devices Global Unlimited Company
Inventor： Christopher Peter Hurrell , Hongxing Li , Colin G. Lyden
Abstract: Techniques that allow application of noise-shaped dither without applying dither at sampling, resulting in the analog-to-digital converter (ADC) circuit advantageously being balanced during acquisition. Balancing the ADC circuit at acquisition can reduce the risk of sampling digital interferences that can couple in through the references or substrates.
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公开(公告)号：US10541702B1
公开(公告)日：2020-01-21
申请号：US16142964
申请日：2018-09-26
Applicant: Analog Devices Global Unlimited Company
Inventor： Rares Andrei Bodnar , Christopher Peter Hurrell
Abstract: Input stages for an analog to digital converter wherein charge for charging parasitic capacitances in the input stage, and particularly in the input switch is sourced from a node which means that it does not have to pass through the input RC filter. This has the effect that the input RC filter can be of lower bandwidth, and/or have a larger resistor value, with the consequent result that there is lower power dissipation in the ADC drive circuitry. In one example this effect is realized by providing a separate input into which charge to charge the parasitic capacitances can be fed from external circuitry. In another example an operational amplifier having high (ideally infinite) input impedance can be used to feed charge to the input switch from the input to the RC filter, or from the node between the resistor and capacitor of the filter, again without unsettling the filter.
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公开(公告)号：US10516408B2
公开(公告)日：2019-12-24
申请号：US15916009
申请日：2018-03-08
Applicant: Analog Devices Global Unlimited Company
Inventor： Rares Bodnar , Asif Ahmad , Christopher Peter Hurrell
Abstract: A stage, suitable for use in an analog to digital converter or a digital to analog converter, can have a plurality of slices that can be operated together to form a composite output. The stage can have reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This feature allows a fast conversion to be achieved without loss of noise performance.
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公开(公告)号：US10511316B2
公开(公告)日：2019-12-17
申请号：US16053455
申请日：2018-08-02
Applicant: Analog Devices Global Unlimited Company
Inventor： Rares Bodnar , Roberto S. Maurino , Christopher Peter Hurrell , Asif Ahmad
Abstract: A stage, suitable for use in and analog to digital converter or a digital to analog converter, comprises a plurality of slices. The slices can be operated together to form a composite output having reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This allows a fast conversion to be achieved without loss of noise performance. The slices can be sub-divided to reduce scaling mismatch between the most significant bit and the least significant bit. A shuffling scheme is implemented that allows shuffling to occur between the sub-sections of the slices without needing to implement a massively complex shuffler.
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公开(公告)号：US20190363630A1
公开(公告)日：2019-11-28
申请号：US15986346
申请日：2018-05-22
Applicant: Analog Devices Global Unlimited Company
Inventor： Christopher Peter Hurrell , Derek J. Hummerston
Abstract: Techniques for supplying a bias current to a load are provided. In certain examples, a circuit can include a level-shift capacitance, a current source, and a load configured to receive a bias current in a first state of the circuit. The current source and the level-shift capacitance can be coupled in series between the load and a supply voltage in the first state. In some examples, during a second state of the circuit, the level-shift capacitance can receive charge, and can be isolated from one of the load or the current source.
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