DEVICE FOR DFT CALCULATION
    1.
    发明申请
    DEVICE FOR DFT CALCULATION 有权
    DFT计算装置

    公开(公告)号:US20100306298A1

    公开(公告)日:2010-12-02

    申请号:US12744903

    申请日:2008-05-15

    IPC分类号: G06F17/14 G06F7/487

    摘要: A device to perform DFT calculations, for example in a GNSS receiver, including two banks of multipliers by constant integer value, the values representing real and imaginary part of twiddle factors in the DFT. A control unit selectively routes the data through the appropriate multipliers to obtain the desired DFT terms. Unused multipliers are tied to constant input values, in order to minimize dynamic power.

    摘要翻译: 用于执行DFT计算的设备,例如在GNSS接收机中,包括恒定整数值的两组乘法器,表示DFT中旋转因子的实部和虚部的值。 控制单元通过适当的乘法器选择性地路由数据以获得期望的DFT项。 未使用的乘法器连接到恒定的输入值,以便最小化动态功率。

    Device for DFT calculation
    2.
    发明授权
    Device for DFT calculation 有权
    用于DFT计算的设备

    公开(公告)号:US08566380B2

    公开(公告)日:2013-10-22

    申请号:US12744903

    申请日:2008-05-15

    IPC分类号: G06F17/14

    摘要: A device to perform DFT calculations, for example in a GNSS receiver, including two banks of multipliers by constant integer value, the values representing real and imaginary part of twiddle factors in the DFT. A control unit selectively routes the data through the appropriate multipliers to obtain the desired DFT terms. Unused multipliers are tied to constant input values, in order to minimize dynamic power.

    摘要翻译: 用于执行DFT计算的设备,例如在GNSS接收机中,包括恒定整数值的两组乘法器,表示DFT中旋转因子的实部和虚部的值。 控制单元通过适当的乘法器选择性地路由数据以获得期望的DFT项。 未使用的乘法器连接到恒定的输入值,以便最小化动态功率。

    MUTLIPHASE CODE GENERATOR AND GNSS RECEIVER
    3.
    发明申请
    MUTLIPHASE CODE GENERATOR AND GNSS RECEIVER 有权
    MUTLIPHASE代码发生器和GNSS接收器

    公开(公告)号:US20100195773A1

    公开(公告)日:2010-08-05

    申请号:US12678273

    申请日:2008-10-09

    申请人: Philip John Young

    发明人: Philip John Young

    IPC分类号: H04L17/00 H04L27/06

    CPC分类号: G01S19/37

    摘要: A code generator, for providing a PRN sequence in a GNSS receiver, has the capability to store an internal status at any given point of the generated sequence. The stored status can be reloaded in the generator, upon an external command, or after a given number of generation cycles, thus slewing the phase of the generated PRN sequence to the value corresponding to the stored status. A parallel-correlation GNSS receiver includes one or more slewable code generators, for successively generating local replicas of GNSS PRN sequences, having different code phases, corresponding to a plurality of candidate signals of different code and Doppler shifts. Each time the code generator must switch from one candidate to a second, it is preemptively controlled or programmed, while generating the code for the first candidate, to store the internal status at the phase point almost aligned with the start of the PRN sequence for the second candidate. When the correlation engine switches from the first candidate to the second one, the stored status is loaded in the code generator, and the small misalignment between the code generator and the desired sequence is corrected, thus setting it at the needed point in phase space. The generator and receiver of the invention are well suited to the search of several GNSS signal in parallel, and require less memory than a table-based code generator.

    摘要翻译: 用于在GNSS接收器中提供PRN序列的代码生成器具有在生成的序列的任何给定点存储内部状态的能力。 存储的状态可以在发生器中,外部命令或给定数量的生成周期之后重新加载,从而将生成的PRN序列的相位旋转到对应于存储状态的值。 并行相关GNSS接收机包括一个或多个可转换码生成器,用于连续产生对应于不同码和多普勒频移的多个候选信号的具有不同码相位的GNSS PRN序列的本地副本。 每次代码生成器必须从一个候选者切换到另一个候选时,它被先占式控制或编程,同时生成第一个候选的代码,以将内部状态存储在几乎与PRN序列的开始对齐的相位点处 第二名候选人 当相关引擎从第一候选者切换到第二候选者时,将存储的状态加载到代码生成器中,并且校正代码生成器和期望序列之间的小的未对准,从而将其设置在相位空间中的所需点处。 本发明的发生器和接收器非常适合并行搜索几个GNSS信号,并且比基于表的代码发生器需要更少的存储器。

    Receiver for radio positioning signals
    4.
    发明授权
    Receiver for radio positioning signals 有权
    接收器用于无线电定位信号

    公开(公告)号:US08314734B2

    公开(公告)日:2012-11-20

    申请号:US12817983

    申请日:2010-06-17

    申请人: Philip John Young

    发明人: Philip John Young

    IPC分类号: G01S19/09 G01S19/24

    CPC分类号: G01S19/37

    摘要: A GPS, GLONASS or Galileo receiver for radio positioning signals wherein at least a part of the computing of position related data based on radio signals received from a plurality of space vehicles is carried out by a graphics or sound processor. The receiver thus makes use of available computing resources, thus achieving a lower bill of material.

    摘要翻译: 一种用于无线电定位信号的GPS,GLONASS或伽利略接收机,其中基于从多个太空车辆接收的无线电信号的位置相关数据的计算的至少一部分由图形或声音处理器执行。 因此,接收器利用可用的计算资源,从而实现较低的物料清单。

    GLOBAL NAVIGATION RECEIVER
    5.
    发明申请
    GLOBAL NAVIGATION RECEIVER 有权
    全球导航接收机

    公开(公告)号:US20100238976A1

    公开(公告)日:2010-09-23

    申请号:US12741160

    申请日:2008-12-05

    申请人: Philip John Young

    发明人: Philip John Young

    IPC分类号: H04B1/69

    摘要: A signal processing system and method for a GNSS digital signal wherein a carrier-stripped GNSS signal, is sampled according to a variable rate, determined by the code NCO, and including a timing circuit arranged to generate a timestamp code determining the sampling time of at least one of the samples in the buffer memory. By taking code samples in this way it is possible to transfer the samples asynchronously to a separate processor for the search task to be performed, for example an asynchronous parallel correlator implemented in the same silicon in hardware, or a media processor such as a graphics accelerator implemented in the same device or a separate physical device.

    摘要翻译: 一种用于GNSS数字信号的信号处理系统和方法,其中根据由代码NCO确定的可变速率采样载波剥离的GNSS信号,并且包括定时电路,其被布置为生成确定采样时间的时间戳码 缓冲存储器中的至少一个样本。 通过以这种方式采取代码样本,可以将样本异步传送到要执行的搜索任务的单独的处理器,例如在硬件中的相同硅中实现的异步并行相关器,或诸如图形加速器的媒体处理器 在同一设备或单独的物理设备中实现。

    GNSS SIGNAL PROCESSOR
    6.
    发明申请
    GNSS SIGNAL PROCESSOR 有权
    GNSS信号处理器

    公开(公告)号:US20100074308A1

    公开(公告)日:2010-03-25

    申请号:US12595450

    申请日:2008-05-09

    申请人: Philip John Young

    发明人: Philip John Young

    IPC分类号: H04B1/707 G01S19/13

    摘要: A signal processor for GPS or other GNSS radiolocalization systems, includes a RAM pre-correlation buffer which is filled in sync with the code NCO, thus all sample alignment in the buffer is fixed The device further includes an amplitude compressor to limit the size of the buffer memory and is optimized to provide data to the following DFT unit in small bursts that can be processed in real time without the need for intermediate buffers. Thanks to these features the processor limits the amount of fast intermediate memories, is simpler and has lowerpower consumption.

    摘要翻译: 用于GPS或其他GNSS放射性定位系统的信号处理器包括与代码NCO同步填充的RAM预相关缓冲器,因此缓冲器中的所有采样对准是固定的。该装置还包括幅度压缩器以限制 缓冲存储器,并经过优化,可以将数据提供给以下小型突发中的DFT单元,可以实时处理,无需中间缓冲区。 由于这些功能,处理器限制了快速中间存储器的数量,更简单,功耗更低。

    Weather prediction system
    7.
    发明授权
    Weather prediction system 有权
    天气预报系统

    公开(公告)号:US08100004B2

    公开(公告)日:2012-01-24

    申请号:US12599242

    申请日:2008-05-22

    IPC分类号: G01W1/00

    摘要: The invention consists of a barometric pressure sensor, coupled to a processor for recording changes in the pressure over time, this is coupled to a GPS device providing an accurate measurement of the altitude which allows for the barometric pressure measurements to be normalized, typically to mean sea level. Once the measurements have been normalized the effects of the vertical motion of the sensor are effectively removed and the resulting trend shows the absolute atmospheric pressure which can then be used for weather prediction.

    摘要翻译: 本发明由大气压力传感器组成,耦合到处理器,用于随时间记录压力的变化,其耦合到GPS装置,其提供高度的精确测量,其允许将气压测量值归一化,通常为 海平面。 一旦测量已经被归一化,传感器的垂直运动的影响被有效地去除,并且所得到的趋势显示绝对的大气压力,然后可用于天气预报。

    OPTIMIZED VITERBI DECODER AND GNSS RECEIVER
    8.
    发明申请
    OPTIMIZED VITERBI DECODER AND GNSS RECEIVER 有权
    优化的VITERBI解码器和GNSS接收器

    公开(公告)号:US20100299583A1

    公开(公告)日:2010-11-25

    申请号:US12680160

    申请日:2008-10-27

    申请人: Philip John Young

    发明人: Philip John Young

    IPC分类号: H03M13/41 G06F11/10 H03M13/23

    摘要: A Viterbi decoder which is based on a special instruction set implemented in the processor, enabling it to handle the Viterbi processing with a much lower CPU loading without significantly increasing the hardware complexity. By careful application of appropriate design constraints specific to the SV navigation and analysis of the Viterbi algorithm an optimised architecture can be realised for embedding Viterbi acceleration logic efficiently into a GNSS chipset.

    摘要翻译: 一种维特比解码器,其基于在处理器中实现的特殊指令集,使得其能够以低得多的CPU加载来处理维特比处理,而不显着增加硬件复杂度。 通过仔细应用特定于SV导航的适当设计约束和维特比算法的分析,可以实现优化的架构,将维特比加速度逻辑有效地嵌入到GNSS芯片组中。

    Global navigation receiver
    9.
    发明授权
    Global navigation receiver 有权
    全球导航接收机

    公开(公告)号:US08705591B2

    公开(公告)日:2014-04-22

    申请号:US12741160

    申请日:2008-12-05

    申请人: Philip John Young

    发明人: Philip John Young

    IPC分类号: H04B1/00

    摘要: A signal processing system and method for a GNSS digital signal wherein a carrier-stripped GNSS signal, is sampled according to a variable rate, determined by the code NCO, and including a timing circuit arranged to generate a timestamp code determining the sampling time of at least one of the samples in the buffer memory. By taking code samples in this way it is possible to transfer the samples asynchronously to a separate processor for the search task to be performed, for example an asynchronous parallel correlator implemented in the same silicon in hardware, or a media processor such as a graphics accelerator implemented in the same device or a separate physical device.

    摘要翻译: 一种用于GNSS数字信号的信号处理系统和方法,其中根据由代码NCO确定的可变速率采样载波剥离的GNSS信号,并且包括定时电路,其被布置为生成确定采样时间的时间戳码 缓冲存储器中的至少一个样本。 通过以这种方式采取代码样本,可以将样本异步传输到要执行的搜索任务的单独的处理器,例如在硬件中的相同硅中实现的异步并行相关器,或诸如图形加速器的媒体处理器 在同一设备或单独的物理设备中实现。

    Optimized Viterbi decoder and GNSS receiver
    10.
    发明授权
    Optimized Viterbi decoder and GNSS receiver 有权
    优化的维特比解码器和GNSS接收机

    公开(公告)号:US08621335B2

    公开(公告)日:2013-12-31

    申请号:US12680160

    申请日:2008-10-27

    申请人: Philip John Young

    发明人: Philip John Young

    IPC分类号: H03M13/03

    摘要: A Viterbi decoder which is based on a special instruction set implemented in the processor, enabling it to handle the Viterbi processing with a much lower CPU loading without significantly increasing the hardware complexity. By careful application of appropriate design constraints specific to the SV navigation and analysis of the Viterbi algorithm an optimised architecture can be realized for embedding Viterbi acceleration logic efficiently into a GNSS chipset.

    摘要翻译: 一种维特比解码器,其基于在处理器中实现的特殊指令集,使得其能够以低得多的CPU加载来处理维特比处理,而不显着增加硬件复杂度。 通过仔细应用特定于SV导航的适当设计约束和维特比算法的分析,可以实现优化的架构,将维特比加速度逻辑有效地嵌入到GNSS芯片组中。