Event scheduling for multi-port xDSL transceivers
    1.
    发明申请
    Event scheduling for multi-port xDSL transceivers 审中-公开
    多端口xDSL收发器的事件调度

    公开(公告)号:US20050025120A1

    公开(公告)日:2005-02-03

    申请号:US10871896

    申请日:2004-06-18

    摘要: A multi-port DSL system terminates a plurality of DSL channels that are multiplexed through a data path of a DSL transceiver. In one embodiment, data path events are generated based on the data transmission in each of the channels. When the data path becomes available to process a next data symbol, the data path processes a data symbol for the channel indicated by the data path events. Optionally, the data path may process a data symbol for a particular channel only if a predetermined amount of time has elapsed since a data symbol was processed for that data channel.

    摘要翻译: 多端口DSL系统终止通过DSL收发器的数据路径复用的多个DSL信道。 在一个实施例中,基于每个信道中的数据传输来生成数据路径事件。 当数据路径变得可用于处理下一个数据符号时,数据路径处理由数据路径事件指示的通道的数据符号。 可选地,只有在从该数据信道处理了数据符号以来经过了预定的时间量时,数据路径才能处理特定信道的数据符号。

    Multi-channel data communications controller
    2.
    发明授权
    Multi-channel data communications controller 失效
    多通道数据通信控制器

    公开(公告)号:US4975828A

    公开(公告)日:1990-12-04

    申请号:US84717

    申请日:1987-08-05

    IPC分类号: H04L29/02 G06F13/38 H04L13/08

    CPC分类号: G06F13/385

    摘要: This invention provides a flexible, general-purpose, engine-based architecture for a multi-channel data communications controller. It can be customized to handle a wide range of protocols and other host system requirements with minimal reliance on the host's processing power. The always present time-critical tasks of transmitting and receiving serial data, as well as transmitting and receiving characters to/from the host, are handled quickly and efficiently by utilizing dedicated interface processors. This leaves the general purpose main engine less burdened with these time cricital tasks, enabling it to perform the relatively more complex (though less time critical) tasks of assembling and disassembling characters, as well as maintaining RAM-based data FIFOs and performing error-checking and other protocol-related tasks. Custon protocols can be implemented merely by re-microcoding the machine, without requiring modifications to the basic architecture of the chip, substantially reducing design time. The flexibility of this general purpose architecture enables controllers to be more customized to a particular user's requirements, resulting not only in faster performance by the controller itself, but also in far less reliance on the host's processing power. What could previously only be done by the host in software can now be done by the controller itself much more quickly.

    摘要翻译: 本发明为多通道数据通信控制器提供了一种灵活的,通用的基于引擎的架构。 它可以定制来处理各种协议和其他主机系统的要求,而不用依赖主机的处理能力。 通过利用专用接口处理器,可以快速高效地处理串行数据的发送和接收以及从主机发送和接收字符的时间关键任务。 这使得通用主要引擎更少地负担这些时间任务,使其能够执行组装和拆卸字符的相对更复杂(但更少的时间关键)任务,以及维护基于RAM的数据FIFO并执行错误检查 和其他协议相关的任务。 Custon协议只能通过对机器进行重新编码来实现,而不需要修改芯片的基本架构,从而大大减少了设计时间。 这种通用架构的灵活性使得控制器能够根据特定用户的要求进行更多的定制,不仅使控制器本身具有更快的性能,而且远远少于对主机处理能力的依赖。 以前只能由主机在软件中完成,现在可以由控制器本身更快地完成。