Method and apparatus for combined linear, low-noise buffer and sampler for ADC
    1.
    发明授权
    Method and apparatus for combined linear, low-noise buffer and sampler for ADC 有权
    用于ADC的组合线性,低噪声缓冲器和采样器的方法和装置

    公开(公告)号:US09130519B1

    公开(公告)日:2015-09-08

    申请号:US13826050

    申请日:2013-03-14

    Applicant: Apple Inc.

    CPC classification number: H03F1/02 G11C27/026 H03M1/1245

    Abstract: A method and apparatus for combined linear, low-noise buffer and sampler for ADC (analog to digital converter) have been disclosed. In one implementation components contributing to sampling errors are included in a feedback path.

    Abstract translation: 已经公开了用于ADC(模数转换器)的组合线性,低噪声缓冲器和采样器的方法和装置。 在一个实现中,有助于采样错误的部件被包括在反馈路径中。

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