公开(公告)号：US20250021332A1

公开(公告)日：2025-01-16

申请号：US18352309

申请日：2023-07-14

Applicant: Apple Inc.

Inventor： Niket K. Choudhary ,  Muawya M. Al-Otoom ,  Pruthivi Vuyyuru ,  Andrew H. Lin ,  Ilhyun Kim ,  Douglas C. Holman ,  Samir Dutt ,  Ronald P. Hall

IPC: G06F9/30 ,  G06F9/38

Abstract: Disclosed techniques relate to trace cache circuitry configured to identify and cache traces that satisfy certain criteria. Prediction circuitry may track directions of executed control transfer instructions, including a first category of control transfer instructions that meet a first threshold bias level toward a given direction (which may be referred to as “stable”) and a second category of control transfer instructions that do not meet the first threshold bias level (which may be referred to as “unstable”). Trace cache circuitry may identify traces of instructions that satisfy a set of criteria, including: only control transfer instructions of the first category are allowed as internal control transfer instructions and a control transfer instruction in the second category is allowed only at an end of a given trace. Disclosed techniques may advantageously provide performance and power advantages of trace caching with reduced complexity, relative to certain traditional trace caches.